Patents by Inventor Ruchi J. Parikh

Ruchi J. Parikh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11183864
    Abstract: An electronic device may receive or provide power using bidirectional wired and wireless power converters. A bypass path may be included to bypass the battery charger and to allow direct power transfers from a connector of the electronic device to the wireless power converter or from the wireless power converter to the connector of the electronic device. Current limiting and regulation circuitry may also be included.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: November 23, 2021
    Assignee: Apple Inc.
    Inventors: Bin Gu, Yongxuan Hu, Stephen C. Terry, Di Zhao, Ruchi J. Parikh, Michael D. Black, Weiyun Chen
  • Publication number: 20190341796
    Abstract: An electronic device may receive or provide power using bidirectional wired and wireless power converters. A bypass path may be included to bypass the battery charger and to allow direct power transfers from a connector of the electronic device to the wireless power converter or from the wireless power converter to the connector of the electronic device. Current limiting and regulation circuitry may also be included.
    Type: Application
    Filed: September 7, 2018
    Publication date: November 7, 2019
    Applicant: Apple Inc.
    Inventors: Bin Gu, Yongxuan Hu, Stephen C. Terry, Di Zhao, Ruchi J. Parikh, Michael D. Black, Weiyun Chen
  • Patent number: 9401639
    Abstract: A system and method capable of injection locking the phases of a peak-valley multiphase regulator includes comparing an output voltage error signal with a ramp control signal and providing a corresponding slope reset signal, using transitions of the slope reset signal to develop a equally spaced high side ramp signals and equally spaced low side ramp signals, and injecting a corresponding one of the high side signals and a corresponding one of the low side ramp signals into each of the phases which correspondingly develop equally spaced pulse control signals for multiphase operation. Such injection locking allows the additional phases to operate out of phase with the first phase and allows operation at high duty cycles.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: July 26, 2016
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Rhys S. A. Philbrick, Emil Chen, Ruchi J. Parikh
  • Patent number: 9312772
    Abstract: A modulator configured to control switching of current through an inductor of a converter according to a current limiting scheme while converting an input voltage to an output voltage, which includes a current limit generator and a comparator network. The current limit generator is configured to provide a periodic ramping current limit value based on either the input voltage or the output voltage, an inductance of the inductor, a timing signal, and a predetermined maximum output current of the boost converter. The comparator network is configured to provide a switch control signal to control switching of current through the inductor by comparing a current sense value indicative of a current through the inductor with a lesser of a compensation error value and the periodic ramping current limit value. The converter may be configured as a peak current mode control converter in either boost or buck mode.
    Type: Grant
    Filed: March 26, 2013
    Date of Patent: April 12, 2016
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Weihong Qiu, Ruchi J. Parikh, Chun Cheung, Zhixiang Liang
  • Patent number: 9190907
    Abstract: An equivalent series inductance (ESL) cancel circuit for a regulator for adjusting a feedback voltage by attenuating a magnitude of a square wave ripple voltage developed on an output voltage. The regulator includes an output inductor and an output capacitor, in which the capacitor has an ESL which forms an inductive voltage divider with the output inductor causing the square wave voltage ripple. The ESL cancel circuit may include first and second current sources and a resistor device coupled between the output node and an adjust node which is further coupled to a feedback input of the regulator. The first current source applies a current proportional to the output voltage to the adjust node. The second current source selectively applies a current proportional to the input voltage of the regulator based on a state of the pulse control signal.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: November 17, 2015
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Rhys S. A. Philbrick, Emil Chen, Gwilym Luff, Ruchi J. Parikh
  • Publication number: 20150061632
    Abstract: An equivalent series inductance (ESL) cancel circuit for a regulator for adjusting a feedback voltage by attenuating a magnitude of a square wave ripple voltage developed on an output voltage. The regulator includes an output inductor and an output capacitor, in which the capacitor has an ESL which forms an inductive voltage divider with the output inductor causing the square wave voltage ripple. The ESL cancel circuit may include first and second current sources and a resistor device coupled between the output node and an adjust node which is further coupled to a feedback input of the regulator. The first current source applies a current proportional to the output voltage to the adjust node. The second current source selectively applies a current proportional to the input voltage of the regulator based on a state of the pulse control signal.
    Type: Application
    Filed: November 22, 2013
    Publication date: March 5, 2015
    Applicant: INTERSIL AMERICAS LLC
    Inventors: Rhys S.A. Philbrick, Emil Chen, Gwilym Luff, Ruchi J. Parikh
  • Publication number: 20150067358
    Abstract: A system and method capable of injection locking the phases of a peak-valley multiphase regulator includes comparing an output voltage error signal with a ramp control signal and providing a corresponding slope reset signal, using transitions of the slope reset signal to develop a equally spaced high side ramp signals and equally spaced low side ramp signals, and injecting a corresponding one of the high side signals and a corresponding one of the low side ramp signals into each of the phases which correspondingly develop equally spaced pulse control signals for multiphase operation. Such injection locking allows the additional phases to operate out of phase with the first phase and allows operation at high duty cycles.
    Type: Application
    Filed: December 6, 2013
    Publication date: March 5, 2015
    Applicant: INTERSIL AMERICAS LLC
    Inventors: Rhys S.A. Philbrick, Emil Chen, Ruchi J. Parikh
  • Publication number: 20140197811
    Abstract: A modulator configured to control switching of current through an inductor of a converter according to a current limiting scheme while converting an input voltage to an output voltage, which includes a current limit generator and a comparator network. The current limit generator is configured to provide a periodic ramping current limit value based on either the input voltage or the output voltage, an inductance of the inductor, a timing signal, and a predetermined maximum output current of the boost converter. The comparator network is configured to provide a switch control signal to control switching of current through the inductor by comparing a current sense value indicative of a current through the inductor with a lesser of a compensation error value and the periodic ramping current limit value. The converter may be configured as a peak current mode control converter in either boost or buck mode.
    Type: Application
    Filed: March 26, 2013
    Publication date: July 17, 2014
    Applicant: Intersil Americas LLC
    Inventors: Weihong Qiu, Ruchi J. Parikh, Chun Cheung, Zhixiang Liang
  • Publication number: 20120049826
    Abstract: A system and method including providing an error voltage indicative of output voltage error, generating an off ramp voltage while a pulse control signal is turned off and otherwise resetting the off ramp voltage, developing the off ramp voltage to have a slope which is inversely proportional to an off time of the pulse control signal, comparing the off ramp voltage with the error voltage and turning on the pulse control signal when the off ramp voltage compares favorably with the error voltage, generating an on ramp voltage while a pulse control signal is turned on and otherwise resetting the on ramp voltage, developing the on ramp voltage with a slope that is proportional to the input voltage, and comparing the on ramp voltage with the reference voltage and turning off the pulse control signal when the on ramp voltage compares favorably with the reference voltage.
    Type: Application
    Filed: January 11, 2011
    Publication date: March 1, 2012
    Applicant: INTERSIL AMERICAS INC.
    Inventors: Calvin H. Hsu, Weihong Qiu, Ruchi J. Parikh, Jun Liu