Patents by Inventor Russell C. Zahorik, deceased

Russell C. Zahorik, deceased has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods for selective removal of material from wafer alignment marks
    Patent number: 7244681
    Abstract: A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon.
    Type: Grant
    Filed: August 25, 2003
    Date of Patent: July 17, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Renee Zahorik, legal representative, Guy F. Hudson, Hugh E. Stroupe, Todd A. Dobson, Brian F. Gordon, Russell C. Zahorik, deceased
  • Small electrode for a chalcogenide switching device and method for fabricating same
    Patent number: 7102151
    Abstract: A memory cell and a method of fabricating the memory cell having a small active area. By forming a spacer in a window that is sized at the photolithographic limit, a pore may be formed in dielectric layer which is smaller than the photolithographic limit. Electrode material is deposited into the pore, and a layer of structure changing material, such as chalcogenide, is deposited onto the lower electrode, thus creating a memory element having an extremely small and reproducible active area.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: September 5, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Alan R. Reinberg, Renee Zahorik, legal representative, Russell C. Zahorik, deceased
  • Method and apparatus for selective removal of material from wafer alignment marks
    Patent number: 6103636
    Abstract: A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon. The process comprising the steps of aligning said area of said wafer, such as an alignment mark on the wafer, to an etchant dispensing apparatus, placing the surface of the wafer adjacent at least a portion of an annular portion of the etchant dispensing apparatus, dispensing at least one etchant onto said area of said wafer, such as an alignment mark, and removing the at least one etching from the wafer.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: August 15, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Russell C. Zahorik, deceased, Guy F. Hudson, Hugh E. Stroupe, Todd A. Dobson, Brian F. Gordon
  • Small electrode for a chalcogenide switching device and method for fabricating same
    Patent number: 5952671
    Abstract: A memory cell and a method of fabricating the memory cell having a small active area. By forming a spacer in a window that is sized at the photolithographic limit, a pore may be formed in dielectric layer which is smaller than the photolithographic limit. Electrode material is deposited into the pore, and a layer of structure changing material, such as chalcogenide, is deposited onto the lower electrode, thus creating a memory element having an extremely small and reproducible active area.
    Type: Grant
    Filed: May 9, 1997
    Date of Patent: September 14, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Alan R. Reinberg, Russell C. Zahorik, deceased