Abstract: System and method for driving an LCD using a data-dependent, logic-level drive scheme. A preferred embodiment comprises determining a desired state of each pixel in an LCD pixel segment, deriving a drive waveform based upon the state of all pixels in the LCD pixel segment, and outputting the drive waveform to the LCD pixel segment. By using the states of all the pixels in the LCD pixel segment in the determination of the drive waveform, it is possible to increase the on and off voltage to help improve display quality.

Abstract: A method to more accurately monitor remaining battery life under varying load conditions. The measured battery voltage is adjusted for the current load and then used to determine the remaining battery life according to the battery voltage discharge curve for the battery type and chemistry. Advantageously, in an embodiment the present invention the remaining battery life can be determined despite fluctuations in the current due to a changing load and without monitoring current flow so that the determination of battery life is independent of the battery charging process.

Abstract: A method to more accurately monitor remaining battery life under varying load conditions. The measured battery voltage is adjusted for the current load and then used to determine the remaining battery life according to the battery voltage discharge curve for the battery type and chemistry. Advantageously, in an embodiment the present invention the remaining battery life can be determined despite fluctuations in the current due to a changing load and without monitoring current flow so that the determination of battery life is independent of the battery charging process.

Abstract: A hardware latch for limiting access to protected system memory. An N-bit bus provides the instructions executed by the system to a combinatorial logic block (204). The combinatorial logic block (204) provides eight separate outputs and functions as a series of comparators. One input of each comparator is connected to the instruction bus, the other input of each comparator is hardwired to indicate the pattern that appears on the bus when a particular instruction is executed. The output from a given comparator is active when that particular instruction is applied to the instruction bus (202). A counter (208) counts the instructions and selects which output from the combinatorial logic block should be selected by multiplexer (206). If the output of the multiplexer is logic false, the sequence of instructions is broken and the counter (208) is reset. If the output of the multiplexer is logic true, the counter is allowed to continue incrementing.

Abstract: A method of controlling contrast in LCDs using dynamic LCD biasing includes the step of identifying an expected bias function as a function of LCD material, LCD operating voltage, and LCD duty cycle. The expected bias function is then approximated to obtain a linear description of the expected bias function. A voltage is generated that follows the linear description of the expected bias function. The step of generating the voltage results in dynamic LCD biasing.

Abstract: A hardware latch for limiting access to protected system memory. An N-bit bus provides the instructions executed by the system to a combinatorial logic block (204). The combinatorial logic block (204) provides eight separate outputs and functions as a series of comparators. One input of each comparator is connected to the instruction bus, the other input of each comparator is hardwired to indicate the pattern that appears on the bus when a particular instruction is executed. The output from a given comparator is active when that particular instruction is applied to the instruction bus (202). A counter (208) counts the instructions and selects which output from the combinatorial logic block should be selected by multiplexer (206). If the output of the multiplexer is logic false, the sequence of instructions is broken and the counter (208) is reset. If the output of the multiplexer is logic true, the counter is allowed to continue incrementing.

Abstract: A method of controlling contrast in LCDs using dynamic LCD biasing includes the step of identifying an expected bias function as a function of LCD material, LCD operating voltage, and LCD duty cycle. The expected bias function is then approximated to obtain a linear description of the expected bias function. A voltage is generated that follows the linear description of the expected bias function. The step of generating the voltage results in dynamic LCD biasing.

Abstract: An information handling system is described having a power supply (16) having a switching circuit (24) that switches a plurality of energy sources (20) and (22) between series and parallel couplings. Associated with the switching circuit (24) is a voltage level detecting circuit (18) for monitoring the voltage level of the energy sources (20) and (22). A processor (12) for controlling the information handling system (10) responds to the voltage level detecting circuit (18) and in the event of a low voltage condition, the processor (12) activates the switching circuit (24) to switch the energy sources (20) and (22) from a series to a parallel coupling. Alternatively, processor (12) responds to other inputs or conditions for actuating switching circuit (24).