Patents by Inventor Russell S. Aoki
Russell S. Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210120668Abstract: An apparatus is provided which comprises: a processor die; a processor substrate having a region extended away from the processor die, wherein the processor die is mounted on the processor substrate, wherein the extended region has at least one signal interface which is connectable to a top-side connector; and an interposer coupled to the processor substrate and a motherboard.Type: ApplicationFiled: December 3, 2020Publication date: April 22, 2021Applicant: Intel CorporationInventors: Russell S. Aoki, Jeffory L. Smalley, Jonathan W. Thibado
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Patent number: 10880994Abstract: An apparatus is provided which comprises: a processor die; a processor substrate having a region extended away from the processor die, wherein the processor die is mounted on the processor substrate, wherein the extended region has at least one signal interface which is connectable to a top-side connector; and an interposer coupled to the processor substrate and a motherboard.Type: GrantFiled: June 2, 2016Date of Patent: December 29, 2020Assignee: Intel CorporationInventors: Russell S. Aoki, Jeffory L. Smalley, Jonathan W. Thibado
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Patent number: 10788856Abstract: Particular embodiments described herein provide for an electronic system that includes a docking station configured to wirelessly couple to an electronic device and a wireless charging element removably coupled to the docking station. The wireless charging element includes a power receiving unit and is configured to wireless charge the electronic device. In an example, the docking station is configured for high speed input/output.Type: GrantFiled: November 24, 2015Date of Patent: September 29, 2020Assignee: Intel CorporationInventors: Brian R. Peil, Russell S. Aoki, Aleksander Magi, James W. Edwards, Don J. Nguyen, Nicholas W. Oakley, Daria A. Loi, Meenakshi Gupta, Nithyananda S. Jeganathan
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Publication number: 20200218314Abstract: Particular embodiments described herein provide for an electronic device that could include a circuit board coupled to a plurality of electronic components (which includes any type of components, elements, circuitry, etc.). One particular example implementation of the electronic device may include a display portion and a keyboard portion that includes a cradle dock to allow the display portion to be removably connected to the keyboard portion in a first configuration, where a viewing angle of the display portion can be adjusted.Type: ApplicationFiled: November 14, 2019Publication date: July 9, 2020Inventors: Michael Hui, Russell S. Aoki, Anthony P. Valpiani, Nicolas A. Kurczewski
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Patent number: 10586764Abstract: Semiconductor packages with programmable routing pathways are disclosed. The semiconductor package may have a source trace that may be electrically coupled to two or more different electrical pathways, where any of the electrical pathways may be activated to provide an electrical connection between the source trace and one or more destination nodes. Each of the electrical pathways may have a corresponding metal well with a correspond airgap overlying the metal well, as well as corresponding heating elements. If a particular heating element is energized, the heating element may melt metal in a corresponding metal well and the molten metal may migrate by capillary action into the overlying airgap to complete an electrical connection between the source trace and a destination node.Type: GrantFiled: March 31, 2016Date of Patent: March 10, 2020Assignee: Intel CorporationInventors: Russell S. Aoki, Dimitrios Ziakas
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Patent number: 10541494Abstract: Apparatuses, methods and storage medium associated with connectors for coupling to a computer processing unit (CPU) package are disclosed herein. In embodiments, a connector assembly for connection to a computer processing unit (CPU) package may include a connector housing. One or more electrical contacts of the connector housing may be to couple to the CPU package when the connector assembly is engaged with a mating connector assembly. The connector assembly may further include a mounting handle affixed to a top of the connector housing. The mounting handle may include a locking latch that extends from the mounting handle. The locking latch may engage with a notch within the mating connector assembly that, when engaged, the locking latch may provide a force to maintain coupling of the one or more electrical contacts with the CPU package when engaged with the mating connector assembly.Type: GrantFiled: March 31, 2016Date of Patent: January 21, 2020Assignee: Intel CorporationInventors: Donald T. Tran, Thomas A. Boyd, Yong Wang, Kevin J. Ceurter, Srikant Nekkanty, Russell S. Aoki, FeiFei Cheng
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Patent number: 10497687Abstract: Configurable semiconductor packages and processes to attain a defined configuration are provided. A configurable semiconductor package includes a base semiconductor package including a semiconductor die mounted on a surface of a package substrate. An expansion package can be mechanically coupled to a mounting member. The expansion package includes a second package substrate and one or more second semiconductor dies that can be surface mounted to the second package substrate. The second package substrate include an array of interconnects that permit coupling (mechanically and/or electrically) the second semiconductor die(s) to the package substrate of the base semiconductor package. The mounting member can mechanically attach to the base semiconductor package, resulting in a package assembly that has the array of interconnects adjacent to another array of interconnects in the package substrate of the base semiconductor package.Type: GrantFiled: December 31, 2016Date of Patent: December 3, 2019Assignee: Intel CorporationInventors: Russell S. Aoki, Casey G. Thielen
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Patent number: 10481643Abstract: Particular embodiments described herein provide for an electronic device that could include a circuit board coupled to a plurality of electronic components (which includes any type of components, elements, circuitry, etc.). One particular example implementation of the electronic device may include a display portion and a keyboard portion that includes a cradle dock to allow the display portion to be removably connected to the keyboard portion in a first configuration, where a viewing angle of the display portion can be adjusted.Type: GrantFiled: August 29, 2017Date of Patent: November 19, 2019Assignee: Intel CorporationInventors: Michael Hui, Russell S. Aoki, Anthony P. Valpiani, Nicolas A. Kurczewski
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Patent number: 10310565Abstract: Particular embodiments described herein provide for an electronic device that includes a flexible display and a support for the flexible display. The support includes a main support structure, at least one curve crease, and a curve region, wherein the curve region includes a curve support.Type: GrantFiled: June 27, 2015Date of Patent: June 4, 2019Assignee: Intel CorporationInventors: Russell S. Aoki, Aleksander Magi, Mark Angus MacDonald, Michael Ahrens
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Patent number: 10260961Abstract: Disclosed herein are integrated circuit (IC) packages with temperature sensor traces, and related systems, devices, and methods. In some embodiments, an IC package may include a package substrate and an IC die disposed on the package substrate, wherein the package substrate includes a temperature sensor trace, and an electrical resistance of the temperature sensor trace is representative of an equivalent temperature of the temperature sensor trace.Type: GrantFiled: December 21, 2015Date of Patent: April 16, 2019Assignee: Intel CorporationInventors: Shelby Ferguson, Rashelle Yee, Russell S. Aoki, Michael Hui, Jonathon Robert Carstens, Joseph J. Jasniewski
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Patent number: 10211120Abstract: A rework grid array interposer with direct power is described. The interposer has a foundation layer mountable between a motherboard and a package. A heater is embedded in the foundation layer to provide local heat to reflow solder to enable at least one of attachment or detachment of the package. A connector is mounted on the foundation layer and coupled to the heater and to the package to provide a connection path directly with the power supply and not via the motherboard. One type of interposer interfaces with a package having a solderable extension. Another interposer has a plurality of heater zones embedded in the foundation layer.Type: GrantFiled: December 23, 2015Date of Patent: February 19, 2019Assignee: Intel CorporationInventors: Russell S. Aoki, Jonathan W. Thibado, Jeffory L. Smalley, David J. Llapitan, Thomas A. Boyd, Harvey R. Kofstad, Dimitrios Ziakas, Hongfei Yan
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Publication number: 20190052016Abstract: Apparatuses, methods and storage medium associated with connectors for coupling to a computer processing unit (CPU) package are disclosed herein. In embodiments, a connector assembly for connection to a computer processing unit (CPU) package may include a connector housing. One or more electrical contacts of the connector housing may be to couple to the CPU package when the connector assembly is engaged with a mating connector assembly. The connector assembly may further include a mounting handle affixed to a top of the connector housing. The mounting handle may include a locking latch that extends from the mounting handle. The locking latch may engage with a notch within the mating connector assembly that, when engaged, the locking latch may provide a force to maintain coupling of the one or more electrical contacts with the CPU package when engaged with the mating connector assembly.Type: ApplicationFiled: March 31, 2016Publication date: February 14, 2019Inventors: Donald T. TRAN, Thomas A. BOYD, Yong WANG, Kevin J. CEURTER, Srikant NEKKANTY, Russell S. AOKI, FeiFei CHENG
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Publication number: 20190035729Abstract: Semiconductor packages with programmable routing pathways are disclosed. The semiconductor package may have a source trace that may be electrically coupled to two or more different electrical pathways, where any of the electrical pathways may be activated to provide an electrical connection between the source trace and one or more destination nodes. Each of the electrical pathways may have a corresponding metal well with a correspond airgap overlying the metal well, as well as corresponding heating elements. If a particular heating element is energized, the heating element may melt metal in a corresponding metal well and the molten metal may migrate by capillary action into the overlying airgap to complete an electrical connection between the source trace and a destination node.Type: ApplicationFiled: March 31, 2016Publication date: January 31, 2019Applicant: INTEL CORPORATIONInventors: Russell S. AOKI, Dimitrios ZIAKAS
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Patent number: 10178763Abstract: Disclosed herein are apparatus, systems, and methods for warpage mitigation in printed circuit board (PCB) assemblies. In some embodiments, a PCB assembly for warpage mitigation may include: a PCB; an interposer disposed on the PCB, wherein the interposer has a first face and an opposing second face, the first face is disposed between the second face and the PCB, conductive contacts are disposed at the second face, solder is disposed on the conductive contacts, the interposer includes a first heater trace proximate to the conductive contacts, and, when a first power is dissipated in the first heater trace, the first heater trace is to generate heat to cause the solder disposed on the conductive contacts to melt; wherein the PCB includes a second heater trace.Type: GrantFiled: December 21, 2015Date of Patent: January 8, 2019Assignee: Intel CorporationInventors: Rashelle Yee, Russell S. Aoki, Shelby Ferguson, Michael Hui, Jonathon Robert Carstens, Joseph J. Jasniewski, Kevin J. Ceurter
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Patent number: 10168749Abstract: Embodiments described herein may include apparatus, system and/or processes to provide an adjustable thermal coupling between cold plate coupled to a first heat source and a liquid-cooled cold plate cooling a second heat source. In embodiments, the adjustable thermal coupling may provide a degree of freedom along an access in accommodating a dimension requirement of the second heat source. Other embodiments may be described and/or claimed.Type: GrantFiled: December 1, 2016Date of Patent: January 1, 2019Assignee: Intel CorporationInventors: Russell S. Aoki, Devdatta P. Kulkarni, Alan W. Tate, Robin A. Steinbrecher, Ralph W. Jensen
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Publication number: 20180352649Abstract: An apparatus is provided which comprises: a processor substrate extended away from a processor die, wherein the processor substrate has at least one signal interface which is connectable to a connector; and an interposer coupled to the processor substrate and a motherboard. Described is an apparatus which comprises: a processor substrate extended away from a processor die, wherein the processor substrate has at least one signal interface; and a motherboard coupled to the processor substrate, wherein the motherboard is configured to have a hole which is large enough to place a connector at least partially in it to couple with the at least one signal interface.Type: ApplicationFiled: June 2, 2016Publication date: December 6, 2018Applicant: Intel CorporationInventors: Russell S. Aoki, Jeffory L. Smalley, Jonathan W. Thibado
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Publication number: 20180350767Abstract: Reflow Grid Array (RGA) technology may be implemented on an interposer device, where the interposer is placed between a motherboard and a ball grid array (BGA) package. The interposer may provide a controlled heat source to reflow solder between the interposer and the BGA package. A technical problem faced by an interposer using RGA technology is application of solder to the RGA interposer. Technical solutions described herein provide processes and equipment for application of solder and formation of solder balls to connect an RGA interposer to a BGA package.Type: ApplicationFiled: August 3, 2018Publication date: December 6, 2018Inventors: Jonathon R. Carstens, Michael S. Brazel, Russell S. Aoki, Laura S. Mortimer
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Publication number: 20180307275Abstract: Particular embodiments described herein provide for an electronic system that includes a docking station configured to wirelessly couple to an electronic device and a wireless charging element removably coupled to the docking station. The wireless charging element includes a power receiving unit and is configured to wireless charge the electronic device. In an example, the docking station is configured for high speed input/output.Type: ApplicationFiled: November 24, 2015Publication date: October 25, 2018Applicant: Intel CorporationInventors: Brian R. Peil, Russell S. Aoki, Aleksander Magi, James W. Edwards, Don J. Nguyen, Nicholas W. Oakley, Daria A. Loi, Meenakshi Gupta, Nithyananda S. Jeganathan
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Patent number: 10109940Abstract: Embodiments herein relate to port frames and connectors for direct connections to integrated circuit packages. In various embodiments, a port frame to receive a connector and maintain a connection between the connector and a computer processor package may include a protrusion to provide stable attachment of the port frame to a bolster frame, a first wall, a second wall opposite the first wall, a first detent in the first wall, and a second detent in the second wall where the connector is to be received between the first wall and the second wall, and where the first detent is to receive a first locking protrusion extending from the connector and the second detent is to receive a second locking protrusion extending from the connector. Other embodiments may be described and/or claimed.Type: GrantFiled: December 13, 2016Date of Patent: October 23, 2018Assignee: Intel CorporationInventors: Thomas A. Boyd, Feifei Cheng, Donald T. Tran, Russell S. Aoki, Karumbu Meyyappan
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Patent number: D863935Type: GrantFiled: December 26, 2014Date of Patent: October 22, 2019Assignee: Intel CorporationInventors: Russell S. Aoki, Jeff Ku, Sheng-Chao Lin