Patents by Inventor Ryan Goodfellow

Ryan Goodfellow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11770071
    Abstract: A method for dynamic enhancement of loop response upon recovery from fault conditions includes detecting a fault condition in response to a programmed output voltage of a Pulse Width Modulation (PWM) converter decreasing below an input voltage of the PWM converter. A peak voltage is sampled at the end of at least one of a plurality of clock cycles of the PWM converter in response to detecting the fault condition, wherein the peak voltage is proportional to a sensed current conducted through a transistor. An error output of an error amplifier is preset to an error value determined by the peak voltage. A PWM driver is controlled with the error value to drive the transistor. An output load is charged to the programmed output voltage with the transistor in response to the input voltage increasing above the programmed output voltage.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: September 26, 2023
    Assignee: NXP USA, INC.
    Inventors: Percy Edgard Neyra, John Ryan Goodfellow, Ondrej Pauk
  • Patent number: 11411497
    Abstract: A switching power regulator and method for recovering the regulator from an unregulated state while preventing overshoot of an output voltage is provided. The regulator includes a dropout detector, a sample-and-hold circuit, a voltage offset circuit and a soft start circuit. When the regulator enters an unregulated state, the dropout detector detects when a pulse width modulation (PWM) signal stops toggling. The sample-and-hold circuit and soft start circuit are used to effectively clamp the voltage at the output of an error amplifier. This causes the output of the error amplifier to regulate around a desired voltage so that the regulator recovers from the unregulated state with little or no overshoot of the output voltage. In another embodiment, a method for recovering from the unregulated state is provided.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: August 9, 2022
    Assignee: NXP USA, Inc.
    Inventors: Kyle James Wollschlager, John Pigott, John Ryan Goodfellow
  • Publication number: 20220060109
    Abstract: A switching power regulator and method for recovering the regulator from an unregulated state while preventing overshoot of an output voltage is provided. The regulator includes a dropout detector, a sample-and-hold circuit, a voltage offset circuit and a soft start circuit. When the regulator enters an unregulated state, the dropout detector detects when a pulse width modulation (PWM) signal stops toggling. The sample-and-hold circuit and soft start circuit are used to effectively clamp the voltage at the output of an error amplifier. This causes the output of the error amplifier to regulate around a desired voltage so that the regulator recovers from the unregulated state with little or no overshoot of the output voltage. In another embodiment, a method for recovering from the unregulated state is provided.
    Type: Application
    Filed: August 18, 2020
    Publication date: February 24, 2022
    Inventors: Kyle James Wollschlager, John Pigott, John Ryan Goodfellow
  • Publication number: 20210313882
    Abstract: A method for dynamic enhancement of loop response upon recovery from fault conditions includes detecting a fault condition in response to a programmed output voltage of a Pulse Width Modulation (PWM) converter decreasing below an input voltage of the PWM converter. A peak voltage is sampled at the end of at least one of a plurality of clock cycles of the PWM converter in response to detecting the fault condition, wherein the peak voltage is proportional to a sensed current conducted through a transistor. An error output of an error amplifier is preset to an error value determined by the peak voltage. A PWM driver is controlled with the error value to drive the transistor. An output load is charged to the programmed output voltage with the transistor in response to the input voltage increasing above the programmed output voltage.
    Type: Application
    Filed: June 17, 2021
    Publication date: October 7, 2021
    Inventors: Percy Edgard Neyra, John Ryan Goodfellow, Ondrej Pauk
  • Patent number: 11050347
    Abstract: A method for dynamic enhancement of loop response upon recovery from fault conditions includes detecting a fault condition in response to a programmed output voltage of a Pulse Width Modulation (PWM) converter decreasing below an input voltage of the PWM converter. A peak voltage is sampled at the end of at least one of a plurality of clock cycles of the PWM converter in response to detecting the fault condition, wherein the peak voltage is proportional to a sensed current conducted through a transistor. An error output of an error amplifier is preset to an error value determined by the peak voltage. A PWM driver is controlled with the error value to drive the transistor. An output load is charged to the programmed output voltage with the transistor in response to the input voltage increasing above the programmed output voltage.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: June 29, 2021
    Assignee: NXP USA, Inc.
    Inventors: Percy Edgard Neyra, John Ryan Goodfellow, Ondrej Pauk
  • Publication number: 20210006158
    Abstract: A method for dynamic enhancement of loop response upon recovery from fault conditions includes detecting a fault condition in response to a programmed output voltage of a Pulse Width Modulation (PWM) converter decreasing below an input voltage of the PWM converter. A peak voltage is sampled at the end of at least one of a plurality of clock cycles of the PWM converter in response to detecting the fault condition, wherein the peak voltage is proportional to a sensed current conducted through a transistor. An error output of an error amplifier is preset to an error value determined by the peak voltage. A PWM driver is controlled with the error value to drive the transistor. An output load is charged to the programmed output voltage with the transistor in response to the input voltage increasing above the programmed output voltage.
    Type: Application
    Filed: July 1, 2019
    Publication date: January 7, 2021
    Inventors: Percy Edgard Neyra, John Ryan Goodfellow, Ondrej Pauk
  • Patent number: 10218254
    Abstract: Embodiments of a switched-mode power supply and a method for operating a switched-mode power supply involve synchronizing a phase and frequency of an asynchronous controller of the switched-mode power supply with a clock signal of a synchronous controller of the switched-mode power supply while the asynchronous controller is in control of a power stage of the switched-mode power supply, concurrent with synchronizing the phase and frequency of the asynchronous controller with the clock signal of the synchronous controller, presetting a state variable of the synchronous controller while the asynchronous controller is in control of the power stage of the switched-mode power supply, and switching control of the power stage from the asynchronous controller to the synchronous controller after the phase and frequency of the asynchronous controller are synchronized with the clock signal of the synchronous controller and after the state variable of the synchronous controller is preset.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: February 26, 2019
    Assignee: NXP USA, Inc.
    Inventors: Percy Edgard Neyra, John Pigott, John Ryan Goodfellow, Kyle James Wollschlager, Ondrej Pauk, Raviraj Dattatraya Vader
  • Patent number: 7023672
    Abstract: Disclosed is a digitally controlled multi-phase voltage regulator system providing regulated power to electronic components that have variable power requirements. Power is supplied by one or more power integrated circuits (IC) each having a high side power switch controlled by pulse width modulated signals and a low side power switch. The power IC senses voltage at the load and has an on-chip current mirror for generating a current that is a ratio of current delivered to the load. The power IC also has current limiting and on-chip temperature sensing components. The voltage and current information is digitized and provided to a control integrated circuit (IC). The control IC receives this digitized information as well as user provided parameters and, in the regulation mode of operation, provides digitized pulse width modulated control signals to the power IC. In an active transient response mode of operation, the control IC provides signals to turn either the high side switches or low side switches ON.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: April 4, 2006
    Assignee: Primarion, Inc.
    Inventors: John Ryan Goodfellow, Robert T. Carroll, Malay Trivedi, Erik McShane, Kevin Mori
  • Patent number: 7007176
    Abstract: A highly phased power regulation (converter) system having an improved control feature is provided. A controller, such as a digital signal processor or microprocessor, receives digital information from a plurality of power conversion blocks and transmits control commands in response to the information. The controller is able to change the mode of operation of the system and/or re-phase the power blocks to accommodate a dynamic load requirement, occasions of high transient response or detection of a fault. A compensation block within the controller is used to regulate the output voltage and provide stability to the system. In one embodiment, the controller is implemented as a PID compensator controller. In another embodiment, a microprocessor is able to receive feedback on its own operation thus providing enabling the controller to anticipate and predict conditions by analyzing precursor data.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: February 28, 2006
    Assignee: Primarion, Inc.
    Inventors: Ryan Goodfellow, Malay Trivedi, Kevin Mori
  • Patent number: 7002249
    Abstract: A semiconductor device package is disclosed which includes inter-digitated input and output bond wires configured to increase the negative mutual inductive coupling between the wires, thus reducing the overall parasitic inductance of the device. In one embodiment, the microelectronic component includes a semiconductor device coupled to a substrate, such as a lead frame, a first set of bond wires connected to the semiconductor device for providing current flow into the semiconductor device, and a second set of bond wires that are in a current loop with the first set of bond wires and are connected to the semiconductor device for providing current flow out of the semiconductor device, wherein the first and second set of bond wires are configured in an inter-digitated pattern to increase the magnitude of mutual inductive coupling between the first and second set of bond wires.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: February 21, 2006
    Assignee: Primarion, Inc.
    Inventors: Thomas P. Duffy, John Ryan Goodfellow, Robert T. Carroll, Kevin J. Cote, Sampath K. V. Karikalan, Suresh Golwalkar
  • Patent number: 6965502
    Abstract: The present invention provides a power regulation system and method with high speed signal settling capabilities for providing rapid active transient response to a microelectronic device. An active transient response system includes a power supply configured to receive external and/or internal signals indicating the occurrence of transient load conditions and to respond to the transient load conditions based on one or more of these signals. The system may further include a transient suppressor configured for early detection of transients, assisting in transient suppression, and early signaling of transient activity to the power supply. The system provides rapid recovery to steady state operation from the active transient response mode by using a digital compensator to quickly modifying the duty cycle and provide a voltage offset proportional to the transient microprocessor load step. Recovery is further improved by current rephasing techniques.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: November 15, 2005
    Assignee: Primarion, Inc.
    Inventors: Thomas P. Duffy, Ryan Goodfellow, Malay Trivedi, Kevin Mori, Benjamim Tang
  • Patent number: 6847197
    Abstract: A method for converting power includes charging an inductor by coupling the inductor to a voltage source for a predetermined amount of time. Thereafter, the inductor is discharged by coupling the inductor to a ground until the current flowing through the inductor equals zero. A method for detecting a zero current flowing through the inductor includes coupling the inductor to a transistor and comparing the output of that transistor to a transistor coupled to ground.
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: January 25, 2005
    Assignee: Primarion, Inc.
    Inventors: David Susak, Ryan Goodfellow
  • Publication number: 20040150928
    Abstract: Disclosed is a digitally controlled multi-phase voltage regulator system providing regulated power to electronic components that have variable power requirements. Power is supplied by one or more power integrated circuits (IC) each having a high side power switch controlled by pulse width modulated signals and a low side power switch. The power IC senses voltage at the load and has an on-chip current mirror for generating a current that is a ratio of current delivered to the load. The power IC also has current limiting and on-chip temperature sensing components. The voltage and current information is digitized and provided to a control integrated circuit (IC). The control IC receives this digitized information as well as user provided parameters and, in the regulation mode of operation, provides digitized pulse width modulated control signals to the power IC. In an active transient response mode of operation, the control IC provides signals to turn either the high side switches or low side switches ON.
    Type: Application
    Filed: February 3, 2003
    Publication date: August 5, 2004
    Inventors: John Ryan Goodfellow, Robert T. Carroll, Malay Trivedi, Erik McShane, Kevin Mori
  • Publication number: 20040104456
    Abstract: A semiconductor device package is disclosed which includes inter-digitated input and output bond wires configured to increase the negative mutual inductive coupling between the wires, thus reducing the overall parasitic inductance of the device. In one embodiment, the microelectronic component includes a semiconductor device coupled to a substrate, such as a lead frame, a first set of bond wires connected to the semiconductor device for providing current flow into the semiconductor device, and a second set of bond wires that are in a current loop with the first set of bond wires and are connected to the semiconductor device for providing current flow out of the semiconductor device, wherein the first and second set of bond wires are configured in an inter-digitated pattern to increase the magnitude of mutual inductive coupling between the first and second set of bond wires.
    Type: Application
    Filed: November 12, 2002
    Publication date: June 3, 2004
    Inventors: Thomas P. Duffy, John Ryan Goodfellow, Robert T. Carroll, Kevin J. Cote, Sampath K.V. Karikalan, Suresh Golwalkar
  • Publication number: 20030102850
    Abstract: A method for converting power includes charging an inductor by coupling the inductor to a voltage source for a predetermined amount of time. Thereafter, the inductor is discharged by coupling the inductor to a ground until the current flowing through the inductor equals zero. A method for detecting a zero current flowing through the inductor includes coupling the inductor to a transistor and comparing the output of that transistor to a transistor coupled to ground.
    Type: Application
    Filed: January 14, 2003
    Publication date: June 5, 2003
    Applicant: Primarion, Inc.
    Inventors: David Susak, Ryan Goodfellow
  • Patent number: 6563294
    Abstract: A highly phased power regulation (converter) system having an improved control feature is provided. A controller, such as a digital signal processor or microprocessor, receives digital information from a plurality of power conversion blocks and transmits control commands in response to the information. The controller is able to change the mode of operation of the system and/or re-phase the power blocks to accommodate a dynamic load requirement, occasions of high transient response or detection of a fault. In one embodiment, a microprocessor receives digital information and converted power from one or more power blocks. In this manner, the microprocessor is able to receive feedback on its own operation. The controller is also able to anticipate and predict conditions by analyzing precursor data. In this manner, the controller is able to modify the system as needed in anticipation of the forthcoming event.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: May 13, 2003
    Assignee: Primarion, Inc.
    Inventors: Thomas P. Duffy, Ryan Goodfellow, David Susak
  • Patent number: 6559684
    Abstract: A system and method for current sensing which is substantially consistent over device, temperature, and process variations is provided. A current sensing system includes a first switch coupled to one or more variable resistive elements. The resistive elements being configured to scale down the voltage across the first switch which is provided to an input of an amplifier. The amplifier is coupled to the resistive elements and the second switch and is configured to sense the voltage across the first switch, and force the voltage across the second switch to be equal to the first switch scaled down voltage. Thus, a current of known proportion can be provided at the output of the amplifier. A driver and timing circuit may be provided to prevent the amplifier from providing an excessive slewing of current during the off period.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: May 6, 2003
    Assignee: Primarion, Inc.
    Inventors: Ryan Goodfellow, David Susak
  • Patent number: 6507175
    Abstract: The present invention is directed to a circuit that is configured to detect a zero current condition at a certain point. The circuit includes a current mirror coupled to two transistors, where the first transistor is coupled to ground and the second transistor is coupled to the point being sensed. The outputs of both the first transistor and the second transistor are each coupled to an input of a comparator. The comparator is configured to determine when an equal voltage condition is present at the two inputs, which signifies a zero-current condition. Such a zero current detector can be used in a buck regulator to prevent a current flow from load to ground and attendant inefficiencies that result. An alternative embodiment involves the use of a controller to sense three different voltages to determine the state of the switches.
    Type: Grant
    Filed: October 15, 2001
    Date of Patent: January 14, 2003
    Assignee: Primarion, Inc.
    Inventors: David Susak, Ryan Goodfellow
  • Publication number: 20020171985
    Abstract: The present invention provides a power regulation system and method with high speed signal settling capabilities for providing rapid active transient response to a microelectronic device. An active transient response system includes a power supply configured to receive external and/or internal signals indicating the occurrence of transient load conditions and to respond to the transient load conditions based on one or more of these signals. The system may further include a transient suppressor configured for early detection of transients, assisting in transient suppression, and early signaling of transient activity to the power supply.
    Type: Application
    Filed: March 22, 2002
    Publication date: November 21, 2002
    Inventors: Thomas P. Duffy, Ryan Goodfellow, Malay Trivedi, Kevin Mori, Benjamim Tang
  • Publication number: 20020158615
    Abstract: A system and method for current sensing which is substantially consistent over device, temperature, and process variations is provided. A current sensing system includes a first switch coupled to one or more variable resistive elements. The resistive elements being configured to scale down the voltage across the first switch which is provided to an input of an amplifier. The amplifier is coupled to the resistive elements and the second switch and is configured to sense the voltage across the first switch, and force the voltage across the second switch to be equal to the first switch scaled down voltage. Thus, a current of known proportion can be provided at the output of the amplifier. A driver and timing circuit may be provided to prevent the amplifier from providing an excessive slewing of current during the off period.
    Type: Application
    Filed: May 8, 2002
    Publication date: October 31, 2002
    Inventors: Ryan Goodfellow, David Susak