Patents by Inventor Ryan W. Eatmon

Ryan W. Eatmon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10474784
    Abstract: Circuit analysis software packages are a significant tool used today in the design of integrated circuits (ICs). Many of the conventional and commercially available simulation or analysis packages, however, are limited to performing static design “checks” using topology based search algorithms to find potential problems in a subject design. Here, a system is provided that allows a user to define parameters that comport with the subject design to generate a set of specific topologies from a set of generic topologies. These generated topologies can then be used to perform a more thorough analysis of the subject design.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: November 12, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Minas Hambardzumyan, Michael J. Krasnicki, Ryan W. Eatmon
  • Publication number: 20110154275
    Abstract: Circuit analysis software packages are a significant tool used today in the design of integrated circuits (ICs). Many of the conventional and commercially available simulation or analysis packages, however, are limited to performing static design “checks” using topology based search algorithms to find potential problems in a subject design. Here, a system is provided that allows a user to define parameters that comport with the subject design to generate a set of specific topologies from a set of generic topologies. These generated topologies can then be used to perform a more thorough analysis of the subject design.
    Type: Application
    Filed: December 17, 2009
    Publication date: June 23, 2011
    Applicant: Texas Instruments Incorporated
    Inventors: Minas Hambardzumyan, Michael J. Krasnicki, Ryan W. Eatmon