Patents by Inventor Ryoichi Fujii

Ryoichi Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240139946
    Abstract: An acquisition unit acquires specification information about a robot that is a component of a robot cell system, member information including shape information about a member, other than the robot, which is also a component of the robot cell system, and work information relating to work to be performed by the robot. A layout planning unit calculates, based on the specification information, the member information, and the work information, one or more layout candidates for the robot and the member in the robot cell system. A pose planning unit calculates, for each layout candidate, a set of combinations of a start pose at a start point and an end pose at an end point of each operation of the robot. A route planning unit calculates, for each layout candidate, a set of routes from the start pose to the end pose of each combination of the start pose and the end pose.
    Type: Application
    Filed: January 19, 2022
    Publication date: May 2, 2024
    Applicant: OMRON Corporation
    Inventors: Takeshi Kojima, Haruka Fujii, Ryoichi Kuratani
  • Publication number: 20240123621
    Abstract: An acquisition unit (32) acquires work information related to work to be performed by a robot having a hand part, grasping information indicating a plurality of candidates for the relative positional relationship between the hand part and a workpiece, workpiece posture information indicating a plurality of candidates for a posture adoptable by the workpiece, and kinematics information regarding the robot. A generation unit (34) generates, for a plurality of target points on a path of the robot for performing the work, a graph (38) which includes a node corresponding to each combination of the workpiece posture information, the posture of the hand part grasping the workpiece, and the posture of the robot, and an edge connecting nodes corresponding to combinations that are transitionable between target points, and in which an estimated operation time corresponding to the transition between the nodes connected by the edge is given to the edge as a weight.
    Type: Application
    Filed: January 19, 2022
    Publication date: April 18, 2024
    Applicant: OMRON Corporation
    Inventors: Haruka Fujii, Takeshi Kojima, Ryoichi Kuratani
  • Patent number: 8809969
    Abstract: A semiconductor device using one or more guard rings includes a p-type guard ring region surrounding a pn junction region, an insulating film covering the p-type guard ring region, one or more conductive films electrically connected with the p-type guard ring region through one or more contact holes made in the insulating film, and a semi-insulating film covering the insulating film and the conductive films. Thus, a desired breakdown voltage characteristic can be ensured even if a foreign matter or the like adheres to a surface of the conductive films.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: August 19, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoichiro Tarui, Atsushi Narazaki, Ryoichi Fujii
  • Patent number: 8450183
    Abstract: A method of manufacturing a power semiconductor device according to the present invention includes the steps of: (a) forming a silicon nitride film on a semiconductor substrate; (b) after the step (a), forming a ring-shaped trench along a peripheral portion of the semiconductor substrate 6; (c) forming a first silicon oxide film on an inner surface of the trench; (d) after the step (c), forming a second silicon oxide film on an entire surface of the semiconductor substrate to bury the trench; (e) planarizing the second silicon oxide film by using the silicon nitride film as a stopper; and (f) forming a third silicon oxide film in a region in which the silicon nitride film is removed.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: May 28, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ryoichi Fujii, Shigeto Honda, Atsushi Narazaki, Kaoru Motonami
  • Patent number: 8435417
    Abstract: A passivation film having a predetermined width from an outer peripheral end portion toward an inner side and extending along the outer peripheral end portion is formed on a front surface of a semiconductor substrate. An outer peripheral end surface orthogonal to the front surface and a rear surface is formed by grinding the outer peripheral end portion of the semiconductor substrate. A thickness of the semiconductor substrate is reduced to a predetermined thickness by grinding the rear surface. The ground rear surface is etched by discharging a mixed acid onto the rear surface while rotating the semiconductor substrate with the rear surface facing upward, to remove a fracture layer. Thereby, chipping or cracking of the semiconductor substrate is suppressed.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: May 7, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunari Nakata, Kaoru Motonami, Atsushi Narazaki, Ayumu Onoyama, Shigeto Honda, Ryoichi Fujii, Tomoya Hirata
  • Publication number: 20110220914
    Abstract: A method of manufacturing a power semiconductor device according to the present invention includes the steps of: (a) forming a silicon nitride film on a semiconductor substrate; (b) after the step (a), forming a ring-shaped trench along a peripheral portion of the semiconductor substrate 6; (c) forming a first silicon oxide film on an inner surface of the trench; (d) after the step (c), forming a second silicon oxide film on an entire surface of the semiconductor substrate to bury the trench; (e) planarizing the second silicon oxide film by using the silicon nitride film as a stopper; and (f) forming a third silicon oxide film in a region in which the silicon nitride film is removed.
    Type: Application
    Filed: December 7, 2010
    Publication date: September 15, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Ryoichi Fujii, Shigeto Honda, Atsushi Narazaki, Kaoru Motonami
  • Publication number: 20110059612
    Abstract: A passivation film having a predetermined width from an outer peripheral end portion toward an inner side and extending along the outer peripheral end portion is formed on a front surface of a semiconductor substrate. An outer peripheral end surface orthogonal to the front surface and a rear surface is formed by grinding the outer peripheral end portion of the semiconductor substrate. A thickness of the semiconductor substrate is reduced to a predetermined thickness by grinding the rear surface. The ground rear surface is etched by discharging a mixed acid onto the rear surface while rotating the semiconductor substrate with the rear surface facing upward, to remove a fracture layer. Thereby, chipping or cracking of the semiconductor substrate is suppressed.
    Type: Application
    Filed: June 30, 2010
    Publication date: March 10, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazunari NAKATA, Kaoru Motonami, Atsushi Narazaki, Ayumu Onoyama, Shigeto Honda, Ryoichi Fujii, Tomoya Hirata
  • Publication number: 20100289110
    Abstract: A semiconductor device using one or more guard rings includes a p-type guard ring region surrounding a pn junction region, an insulating film covering the p-type guard ring region, one or more conductive films electrically connected with the p-type guard ring region through one or more contact holes made in the insulating film, and a semi-insulating film covering the insulating film and the conductive films. Thus, a desired breakdown voltage characteristic can be ensured even if a foreign matter or the like adheres to a surface of the conductive films.
    Type: Application
    Filed: December 31, 2009
    Publication date: November 18, 2010
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yoichiro TARUI, Atsushi Narazaki, Ryoichi Fujii
  • Patent number: 5213107
    Abstract: A portable electrocardiograph capable of providing a low electricity consumption rate by controlling an electric power supply from a power supply device, the portable electrocardiograph includes a unit for detecting electrocardiographic signals and for converting the electrocardiographic signals into electrocardiographic complex data, a unit connected with the detecting unit for displaying the electrocardiographic complex data, and a unit for controlling an electric power supply for either the detecting unit or the displaying unit in accordance with a predetermined mode so that the electric power supply from the power supply device is continued during a predetermined time period.
    Type: Grant
    Filed: March 25, 1991
    Date of Patent: May 25, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Ryoichi Fujii
  • Patent number: 4812835
    Abstract: A segment arrangement suitable for a Celsius and Fahrenheit clinical thermometer comprises two upper digit displays and two lower digit displays. The upper digit displays can merely display four figures "3", "4", "9", and "10". The lower digit displays can display "00" through "99" figures, so as to display 35.0-42.0 degrees Centigrade and 96.8-105.8 degrees Fahrenheit. The two upper digit displays have such a specific configuration that a first digit display is provided which comprises a vertical major segment and a second digit display is provided which comprises two vertical minor segments, three horizontal segments, and one vertical major segment. The vertical major segment of the first digit display is electrically coupled to one of the two vertical minor segments.
    Type: Grant
    Filed: August 3, 1987
    Date of Patent: March 14, 1989
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihiro Wada, Ryoichi Fujii
  • Patent number: 4764027
    Abstract: A display electrode arrangement for an electronic clinical thermometer includes two groups of segment electrodes and two groups of common electrodes, and a driving circuit for selectively driving segment signals and common signals. Each of the two groups of segment electrodes and common electrodes is operated to display only a "3" or a "4" in the Centigrade degrees, and a "9" or a "10" for the Fahrenheit degrees. Those numerals may be displayed by combining the displayed portions.
    Type: Grant
    Filed: April 29, 1986
    Date of Patent: August 16, 1988
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihiro Wada, Ryoichi Fujii, Takashi Suzuki
  • Patent number: 3992510
    Abstract: A process for recovery of iodine from waste containing iodine or iodine compound, comprising the steps of burning the waste in a cumbustion chamber, and scrubbing out the iodine or iodine compound in the resulting combustion gas with a basic aqueous solution of sodium thiosulfate.
    Type: Grant
    Filed: May 6, 1975
    Date of Patent: November 16, 1976
    Assignee: Harima Chemicals, Inc.
    Inventors: Masahisa Ishigami, Kunio Arimoto, Yoshikazu Inoue, Ryoichi Fujii