Patents by Inventor Ryoko Miyachi
Ryoko Miyachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8418157Abstract: A compiler comprises an analysis unit that detects directives (options and pragmas) from a user to the compiler, an optimization unit that is made up of a processing unit (a global region allocation unit, a software pipelining unit, a loop unrolling unit, a “if” conversion unit, and a pair instruction generation unit) that performs individual optimization processing designated by options and pragmas from a user, following the directives and the like from the analysis unit, etc. The global region allocation unit performs optimization processing, following designation of the maximum data size of variables to be allocated to a global region, designation of variables to be allocated to the global region, and options and pragmas regarding designation of variables not to be allocated in the global region.Type: GrantFiled: February 16, 2010Date of Patent: April 9, 2013Assignee: Panasonic CorporationInventors: Hajime Ogawa, Taketo Heishi, Toshiyuki Sakata, Shuichi Takayama, Shohei Michimoto, Tomoo Hamada, Ryoko Miyachi
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Patent number: 8151254Abstract: An operator definition file 102 and the like included in a source program 101 and a compiler 100 that translates the source program 101 into a machine language program 105 are provided. The operator definition file 102 includes definitions of various fixed point type operators by class definitions. The compiler 100 can generate effectively advanced and specific instructions that a processor executes and make improvements through expanding functions and the like without repeating frequently upgrading of the version of the compiler itself. The compiler 100 is made up of an intermediate code generation unit 121 that generates intermediate codes, a machine language instruction substitution unit 122 that substitutes the intermediate codes referring to classes defined by the operator definition file 102 with machine language instructions and an optimization unit 130 that performs optimization targeting the intermediate codes including the substituted machine language instructions.Type: GrantFiled: April 24, 2007Date of Patent: April 3, 2012Assignee: Panasonic CorporationInventors: Taketo Heishi, Toshiyuki Sakata, Hajime Ogawa, Ryoko Miyachi, Shuji Miyasaka, Tomokazu Ishikawa
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Publication number: 20110298990Abstract: A digital broadcast receiving apparatus includes a channel selection control unit selecting a channel of a digital broadcast, a demultiplexing unit and a video decoder obtaining video data and data broadcast data from electrical wave of the digital broadcast of the channel selected by the channel selection control unit, a data broadcast accumulation unit accumulating the data broadcast data obtained by the acquisition unit for each channel, and a rendering unit and a video composition unit generating composite video data by reading out the data broadcast data of at least one channel that includes a channel different from a channel of the video data obtained by the acquisition unit from the data broadcast accumulation unit and combining the readout data broadcast data and the video data obtained by the acquisition unit.Type: ApplicationFiled: August 22, 2011Publication date: December 8, 2011Applicant: PANASONIC CORPORATIONInventors: Yasuhiro ISHII, Shuichi TAKAYAMA, Ryoko MIYACHI
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Patent number: 7827542Abstract: A compiler apparatus that improves the performance of loop processing. The compiler apparatus translates a C program that includes a loop into a machine language program, and includes: a movement judgment unit that judges whether or not an instruction which is positioned outside of the loop of the C program can be moved into the loop, based on a state of live ranges of variables used in the instruction; a movement execution unit that moves the instruction into the loop in the case where the movement judgment unit judges that the instruction can be moved into the loop, thereby generating an intermediate program; and a translation unit that translates the intermediate program into the machine language program.Type: GrantFiled: September 25, 2006Date of Patent: November 2, 2010Assignee: Panasonic CorporationInventors: Hajime Ogawa, Ryoko Miyachi, Toshiyuki Sakata
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Publication number: 20100175056Abstract: A compiler comprises an analysis unit that detects directives (options and pragmas) from a user to the compiler, an optimization unit that is made up of a processing unit (a global region allocation unit, a software pipelining unit, a loop unrolling unit, a “if” conversion unit, and a pair instruction generation unit) that performs individual optimization processing designated by options and pragmas from a user, following the directives and the like from the analysis unit, etc. The global region allocation unit performs optimization processing, following designation of the maximum data size of variables to be allocated to a global region, designation of variables to be allocated to the global region, and options and pragmas regarding designation of variables not to be allocated in the global region.Type: ApplicationFiled: February 16, 2010Publication date: July 8, 2010Inventors: Hajime OGAWA, Taketo Heishi, Toshiyuki Sakata, Shuichi Takayama, Shohei Michimoto, Tomoo Hamada, Ryoko Miyachi
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Patent number: 7698696Abstract: A compiler comprises an analysis unit that detects directives (options and pragmas) from a user to the compiler, an optimization unit that is made up of a processing unit (a global region allocation unit, a software pipelining unit, a loop unrolling unit, a “if” conversion unit, and a pair instruction generation unit) that performs individual optimization processing designated by options and pragmas from a user, following the directives and the like from the analysis unit, etc. The global region allocation unit performs optimization processing, following designation of the maximum data size of variables to be allocated to a global region, designation of variables to be allocated to the global region, and options and pragmas regarding designation of variables not to be allocated in the global region.Type: GrantFiled: June 30, 2003Date of Patent: April 13, 2010Assignee: Panasonic CorporationInventors: Hajime Ogawa, Taketo Heishi, Toshiyuki Sakata, Shuichi Takayama, Shohei Michimoto, Tomoo Hamada, Ryoko Miyachi
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Patent number: 7350165Abstract: A compiler apparatus enables description of a particular hardware module in the existing programming language, although the description has not been possible in hardware designing to input programming language. In the header file 24, a particular hardware indescribable in programming language is defined. And the compiler apparatus includes a parser unit 30 analyzing syntax of source program 22, an intermediate code converting unit 32 converting the syntactically analyzed source program 22 to an intermediate code and code generating unit 36 converting the intermediate code to the RTL description. The intermediate code converting unit 32 includes a detecting unit 40 detecting a particular hardware defined in the header file 24 out of the source program 22 and a replacing unit 42 replacing the detected particular hardware in the detecting unit 40 with the intermediate code corresponding to a particular hardware.Type: GrantFiled: March 24, 2005Date of Patent: March 25, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Ryoko Miyachi, Tomoo Hamada, Hajime Ogawa, Shohei Michimoto, Yasuhiro Yamamoto, Teruo Kawabata, Hirotetsu Tomita
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Publication number: 20070256065Abstract: An operator definition file 102 and the like included in a source program 101 and a compiler 100 that translates the source program 101 into a machine language program 105 are provided. The operator definition file 102 includes definitions of various fixed point type operators by class definitions. The compiler 100 can generate effectively advanced and specific instructions that a processor executes and make improvements through expanding functions and the like without repeating frequently upgrading of the version of the compiler itself. The compiler 100 is made up of an intermediate code generation unit 121 that generates intermediate codes, a machine language instruction substitution unit 122 that substitutes the intermediate codes referring to classes defined by the operator definition file 102 with machine language instructions and an optimization unit 130 that performs optimization targeting the intermediate codes including the substituted machine language instructions.Type: ApplicationFiled: April 24, 2007Publication date: November 1, 2007Inventors: Taketo Heishi, Toshiyuki Sakata, Hajime Ogawa, Ryoko Miyachi, Shuji Miyasaka, Tomokazu Ishikawa
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Patent number: 7284241Abstract: An operator definition file 102 and the like included in a source program 101 and a compiler 100 that translates the source program 101 into a machine language program 105 are provided. The operator definition file 102 includes definitions of various fixed point type operators by class definitions. The compiler 100 can generate effectively advanced and specific instructions that a processor executes and make improvements through expanding functions and the like without repeating frequently upgrading of the version of the compiler itself. The compiler 100 is made up of an intermediate code generation unit 121 that generates intermediate codes, a machine language instruction substitution unit 122 that substitutes the intermediate codes referring to classes defined by the operator definition file 102 with machine language instructions and an optimization unit 130 that performs optimization targeting the intermediate codes including the substituted machine language instructions.Type: GrantFiled: July 31, 2003Date of Patent: October 16, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Taketo Heishi, Toshiyuki Sakata, Hajime Ogawa, Ryoko Miyachi, Shuji Miyasaka, Tomokazu Ishikawa
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Publication number: 20070168984Abstract: A compiling system which translates a source program written in a high-level language into a machine language program, and includes a source level optimizer which converts an original source S program into an optimized source program by optimizing the original source program at the source program level, a compiler which converts the optimized source program into the machine language program, and a final debug information selection generation unit which generates final debug information which indicates a corresponding relationship between the original source program and the machine language program.Type: ApplicationFiled: November 1, 2006Publication date: July 19, 2007Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Taketo HEISHI, Ryoko MIYACHI, Shohei MICHIMOTO, Teruo KAWABATA, Yasuhiro YAMAMOTO
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Publication number: 20070074196Abstract: A compiler apparatus that improves the performance of loop processing. The compiler apparatus translates a C program that includes a loop into a machine language program, and includes: a movement judgment unit that judges whether or not an instruction which is positioned outside of the loop of the C program can be moved into the loop, based on a state of live ranges of variables used in the instruction; a movement execution unit that moves the instruction into the loop in the case where the movement judgment unit judges that the instruction can be moved into the loop, thereby generating an intermediate program; and a translation unit that translates the intermediate program into the machine language program.Type: ApplicationFiled: September 25, 2006Publication date: March 29, 2007Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Hajime OGAWA, Ryoko MIYACHI, Toshiyuki SAKATA
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Patent number: 7171186Abstract: Data which indicates remaining capacity of a battery in terms of the terminal voltage of the battery is updated by a control unit when necessary, whereby available capacity of the battery is accurately calculated regardless of the extent of deterioration of the battery. In addition to the battery's calculated available capacity, a radio-wave receiving condition and a temperature detected by a temperature detection unit are also taken into consideration to accurately calculate and display an available time. Moreover, the control unit performs the entire process of backing up user data into a non-volatile internal memory (flash memory), which reduces power consumption required for the backup process, resulting in a longer available time.Type: GrantFiled: July 14, 2003Date of Patent: January 30, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Ryoko Miyachi, Tsutomu Mikami
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Publication number: 20060150135Abstract: Provided is an apparatus for generating circuit design information automatically clock gated, for the purpose of alleviating the burden of a designer in performing clock gating to a circuit.Type: ApplicationFiled: December 1, 2005Publication date: July 6, 2006Inventors: Tomoo Hamada, Hajime Ogawa, Ryoko Miyachi, Shohei Michimoto, Yasuhiro Yamamoto, Teruo Kawabata, Hirotetsu Tomita
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Publication number: 20060107267Abstract: An instruction scheduling method according to the present invention allocates each instruction included in an instruction sequence to be synthesized as a circuit to one of execution cycles in the circuit, and includes: detecting a freedom of each instruction, the freedom representing a time period within which the instruction can be allocated; calculating a load of a processing element corresponding to the instruction for each of the execution cycles; and allocating the instructions using the same processing element within the freedoms to different execution cycles based on the load.Type: ApplicationFiled: November 10, 2005Publication date: May 18, 2006Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Ryoko Miyachi, Hajime Ogawa, Tomoo Hamada, Teruo Kawabata
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Publication number: 20050216869Abstract: A compiler apparatus enabling description of a particular hardware module in the existing programming language, although the description has not been possible in hardware designing to input programming language. In the header file 24, a particular hardware indescribable in programming language is defined. And the compiler apparatus includes a parser unit 30 analyzing syntax of source program 22, an intermediate code converting unit 32 converting the syntactically analyzed source program 22 to an intermediate code and code generating unit 36 converting the intermediate code to the RTL description. The intermediate code converting unit 32 includes a detecting unit 40 detecting a particular hardware defined in the header file 24 out of the source program 22 and a replacing unit 42 replacing the detected particular hardware in the detecting unit 40 with the intermediate code corresponding to a particular hardware.Type: ApplicationFiled: March 24, 2005Publication date: September 29, 2005Inventors: Ryoko Miyachi, Tomoo Hamada, Hajime Ogawa, Shohei Michimoto, Yasuhiro Yamamoto, Teruo Kawabata, Hirotetsu Tomita
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Publication number: 20040098713Abstract: The present invention provides a highly-flexible compiler that a user can control optimization by the compiler precisely.Type: ApplicationFiled: June 30, 2003Publication date: May 20, 2004Inventors: Hajime Ogawa, Taketo Heishi, Toshiyuki Sakata, Shuichi Takayama, Shohei Michimoto, Tomoo Hamada, Ryoko Miyachi
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Publication number: 20040088503Abstract: An information processing method includes the steps of: obtaining, among arithmetic instructions, information on data sets referred to by memory reference, and assigning to different banks a plurality of data sets simultaneously referred to by memory reference performed in accordance with an arithmetic instruction. This allows bank assignment to be performed automatically without causing memory bank conflict.Type: ApplicationFiled: October 20, 2003Publication date: May 6, 2004Applicant: MATSUSHITA ELECTRIC CO., LTD.Inventors: Ryoko Miyachi, Wataru Hashiguchi
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Publication number: 20040025150Abstract: An operator definition file 102 and the like included in a source program 101 and a compiler 100 that translates the source program 101 into a machine language program 105 are provided. The operator definition file 102 includes definitions of various fixed point type operators by class definitions. The compiler 100 can generate effectively advanced and specific instructions that a processor executes and make improvements through expanding functions and the like without repeating frequently upgrading of the version of the compiler itself. The compiler 100 is made up of an intermediate code generation unit 121 that generates intermediate codes, a machine language instruction substitution unit 122 that substitutes the intermediate codes referring to classes defined by the operator definition file 102 with machine language instructions and an optimization unit 130 that performs optimization targeting the intermediate codes including the substituted machine language instructions.Type: ApplicationFiled: July 31, 2003Publication date: February 5, 2004Inventors: Taketo Heishi, Toshiyuki Sakata, Hajime Ogawa, Ryoko Miyachi, Shuji Miyasaka, Tomokazu Ishikawa
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Publication number: 20040014489Abstract: Data which indicates remaining capacity of a battery in terms of the terminal voltage of the battery is updated by a control unit when necessary, whereby available capacity of the battery is accurately calculated regardless of the extent of deterioration of the battery. In addition to the battery's calculated available capacity, a radio-wave receiving condition and a temperature detected by a temperature detection unit are also taken into consideration to accurately calculate and display an available time. Moreover, the control unit performs the entire process of backing up user data into a non-volatile internal memory (flash memory), which reduces power consumption required for the backup process, resulting in a longer available time.Type: ApplicationFiled: July 14, 2003Publication date: January 22, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Ryoko Miyachi, Tsutomu Mikami