Patents by Inventor Ryota Tanaka

Ryota Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11982965
    Abstract: An image forming apparatus includes a developing member, a first detection processing portion, and an acquisition processing portion. The developing member conveys developer to a facing portion between the developing member and the image-carrying member. The first detection processing portion detects a first development current for each of a plurality of specific voltages with different DC voltage values applied to the developing member, the first development current flowing, in response to application of the specific voltages, through the facing portion including the developer and a specific exposed area, formed by the light emitting portion, on the image-carrying member. The acquisition processing portion acquires a potential value of the specific exposed area based on the DC voltage values of the specific voltages and current values of the first development current, detected by the first detection processing portion, corresponding to the respective specific voltages.
    Type: Grant
    Filed: October 28, 2022
    Date of Patent: May 14, 2024
    Assignee: KYOCERA Document Solutions Inc.
    Inventors: Kazunori Tanaka, Yoshihiro Yamagishi, Tamotsu Shimizu, Kazuhiro Nakachi, Ryota Okui
  • Publication number: 20240149572
    Abstract: A gas barrier film includes a base material containing a polyethylene as a main resin component and an inorganic oxide layer formed on a first surface side of the base material. The birefringence AN of the first surface calculated based on measurement by a parallel Nicol rotation method is 0 or more and 0.007 or less, and the proportion of the polyethylene in the entire gas barrier film is 90 mass % or more.
    Type: Application
    Filed: December 19, 2023
    Publication date: May 9, 2024
    Applicant: TOPPAN INC.
    Inventors: Ryota TANAKA, Haruka OMORI, Kenta OSAWA, Kenji MATSUHISA
  • Publication number: 20240138150
    Abstract: A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Applicant: Kioxia Corporation
    Inventors: Masaru KITO, Hideaki AOCHI, Ryota KATSUMATA, Akihiro NITAYAMA, Masaru KIDOH, Hiroyasu TANAKA, Yoshiaki FUKUZUMI, Yasuyuki MATSUOKA, Mitsuru SATO
  • Patent number: 11952455
    Abstract: The present invention provides a foam having a surface which solates or gelates after absorption of water and appropriately absorbs the water. The foam is prepared by a foam reaction of a mixture comprising at least one polyol, a compound having at least one isocyanate group, and a hydrophilic polymer.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: April 9, 2024
    Assignee: ALCARE CO., LTD.
    Inventors: Takabumi Kubo, Tomoya Tanaka, Ryota Watanabe
  • Publication number: 20240103414
    Abstract: A fixing unit or device that can be used in an image forming apparatus includes a first heater element that is formed of a material that increases in electrical resistance with increases in temperature. A controller of the fixing unit is configured to vary a duty ratio of electric power applied to the first heater element during a start-up operation in which the temperature of the first heater element is raised to a target operating temperature. By varying the duty ratio during the start-up operation, changes in the resistance of the first heater element with the heating can be compensated. For example, the duty ratio can be increased during the course of the start-up to achieve the target operating temperature faster.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Inventors: Kiyotaka MURAKAMI, Kazuhiko KIKUCHI, Sasuke ENDO, Masaya TANAKA, Ryota SAEKI, Kousei MIYASHITA, Ryosuke KOJIMA, Yohei DOI, Yuki KAWASHIMA, Eiji SHINOHARA
  • Patent number: 11917008
    Abstract: Provided is a relay server capable of reducing network traffic when collecting large amounts of sensor data from a large number of sensor terminals. A relay server that collects sensor data from a plurality of sensor terminals and uploads the sensor data to a central server via a network includes a data collection unit that collects the sensor data from the plurality of sensor terminals, a relay data creation unit that calculates a presence of spatial overlaps between the collected sensor data, removes overlaps between the sensor data, and creates relay data integrating the sensor data, and an upload unit that uploads the relay data to the central server.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: February 27, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Kazuya Matsuo, Masaru Takagi, Ryota Nakada, Koya Mori, Hiroyuki Tanaka
  • Publication number: 20240059578
    Abstract: Provided is a method for manufacturing a titanium dioxide semiconductor. The method does not require a complicated pretreatment and makes it possible to easily manufacture a titanium dioxide semiconductor with general-purpose devices. The method for manufacturing a titanium dioxide semiconductor includes: a first immersion step of immersing a substrate containing titanium in hydrogen peroxide water at 70° C. or higher and 90° C. or lower for 1 hour or more and 28 hours or less, and a second immersion step. The second immersion step includes a normal temperature water immersion step of immersing the substrate subjected to the first immersion step in normal temperature water at 10° C. or higher and 30° C. or lower for 24 hours or more and 48 hours or less, and a hot water immersion step of immersing the substrate subjected to the normal temperature water immersion step in hot water at 70° C. or higher and 90° C. or lower for 24 hours or more and 96 hours or less.
    Type: Application
    Filed: November 8, 2021
    Publication date: February 22, 2024
    Inventors: Takahiro Ikejiri, Ryota Tanaka, Shinya Tsukada, Yoshikazu Endo, Hiroshi Kominami
  • Patent number: 11881526
    Abstract: A semiconductor device includes: a substrate; a source region formed on a main surface of the substrate; a well region electrically connected to the source region; a drift region in contact with the well region; a drain region in contact with the drift region; a first electrode electrically connected to the source region; a second electrode electrically connected to the drain region; a third electrode formed in contact with the source region, the well region, and the drift region through an insulating film; and a parasitic capacitance reduction region formed in contact with the source region and in contact with the third electrode through the insulating film and having a higher resistance value than that of the source region.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: January 23, 2024
    Assignees: Nissan Motor Co., Ltd., RENAULT S.A.S.
    Inventors: Toshiharu Marui, Tetsuya Hayashi, Keiichiro Numakura, Wei Ni, Ryota Tanaka, Yuichi Iwasaki
  • Publication number: 20230411516
    Abstract: A semiconductor device includes: a substrate; a source region formed on a main surface of the substrate; a well region electrically connected to the source region; a drift region in contact with the well region; a drain region in contact with the drift region; a first electrode electrically connected to the source region; a second electrode electrically connected to the drain region; a third electrode formed in contact with the source region, the well region, and the drift region through an insulating film; and a parasitic capacitance reduction region formed in contact with the source region and in contact with the third electrode through the insulating film and having a higher resistance value than that of the source region.
    Type: Application
    Filed: November 9, 2020
    Publication date: December 21, 2023
    Applicants: Nissan Motor Co., Ltd., RENAULT S.A.S.
    Inventors: Toshiharu Marui, Tetsuya Hayashi, Keiichiro Numakura, Wei Ni, Ryota Tanaka, Yuichi Iwasaki
  • Publication number: 20230330976
    Abstract: This multilayer body is provided with a base layer, an intermediate layer, a heat seal layer, a first adhesive layer that is provided between the base layer and the intermediate layer, and a second adhesive layer that is provided between the intermediate layer and the heat seal layer. The base layer, the intermediate layer, and the heat seal layer are configured to include polyethylene. In a case where the base layer is a stretched polyethylene film, the intermediate layer is an unstretched polyethylene film, and in a case where the intermediate layer is a stretched polyethylene film, the base layer is an unstretched polyethylene film. The proportion of polyethylene in the multilayer body is 90% by mass or more.
    Type: Application
    Filed: June 12, 2023
    Publication date: October 19, 2023
    Applicant: TOPPAN INC.
    Inventors: Ryota TANAKA, Shinya OCHIAI
  • Patent number: 11756994
    Abstract: A semiconductor device includes a semiconductor base body, and a first main electrode and a second main electrode provided on the semiconductor base body. The semiconductor base body includes a drift region of a first conductivity type through which a main current flows, a column region of a second conductivity type arranged adjacent to the drift region in parallel to a current passage of the main current, a second electrode-connection region of the first conductivity type electrically connected to the second main electrode, and a low-density electric-field relaxation region of the first conductivity type having a lower impurity concentration than the drift region and arranged between the second electrode-connection region and the column region.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: September 12, 2023
    Assignees: NISSAN MOTOR CO., LTD., RENAULT S.A.S.
    Inventors: Toshiharu Marui, Tetsuya Hayashi, Keiichiro Numakura, Wei Ni, Ryota Tanaka, Keisuke Takemoto
  • Publication number: 20230253512
    Abstract: A method for manufacturing a semiconductor device includes forming a trench on a first main surface of a conductive semiconductor substrate. The method includes laminating conductive layers, each of which is a first or a second conductive layer, along a surface normal direction of a side surface of the trench, while forming dielectric layers between a conductive layer closest to the side surface of the trench and the side surface of the trench, and between the corresponding conductive layers; and removing the first conductive layer and the dielectric layer, which are formed on a bottom portion of the trench, to electrically connect the second conductive layer to the semiconductor substrate at the bottom portion of the trench. After a portion of the first main surface, the portion being outside of the trench, is covered with an insulating protective film, the first conductive layer and the dielectric layer are removed.
    Type: Application
    Filed: April 17, 2023
    Publication date: August 10, 2023
    Applicants: NISSAN MOTOR CO., LTD., RENAULT S.A.S.
    Inventors: Toshiharu MARUI, Tetsuya HAYASHI, Keiichiro NUMAKURA, Wei NI, Ryota TANAKA
  • Publication number: 20230227228
    Abstract: A packaging material for packaging contents containing fragrances includes a first polyolefin layer, an inorganic deposition layer, a gas barrier coating layer, and a second polyolefin layer having heat-sealing properties, in this order.
    Type: Application
    Filed: March 28, 2023
    Publication date: July 20, 2023
    Applicant: TOPPAN INC.
    Inventors: Ryota TANAKA, Shinya OCHIAI, Kotaro WATANABE, Yuta OKEYA
  • Patent number: 11664466
    Abstract: A semiconductor device includes: a conductive semiconductor substrate in which a trench is formed on the first main surface; a plurality of conductive layers, each of which is either a first conductive layer or a second conductive layer, which are laminated on one another along a surface normal direction of a side surface of the trench; and dielectric layers arranged between a conductive layer closest to the side surface of the trench among the plurality of conductive layers and the side surface of the trench, and between the plurality of corresponding conductive layers. The first conductive layer is electrically insulated from the semiconductor substrate, and the semiconductor substrate that electrically connects to the second conductive layer inside the trench electrically connects to the second electrode.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: May 30, 2023
    Assignees: NISSAN MOTOR CO., LTD., RENAULT S.A.S.
    Inventors: Toshiharu Marui, Tetsuya Hayashi, Keiichiro Numakura, Wei Ni, Ryota Tanaka
  • Publication number: 20230087185
    Abstract: A gas barrier laminate according to an aspect of the present disclosure has a structure having a base material layer including a polyolefin, an undercoat layer, an inorganic oxide layer, a gas barrier adhesive layer, and a resin layer including a polyolefin laminated therein in this order.
    Type: Application
    Filed: February 4, 2021
    Publication date: March 23, 2023
    Applicant: TOPPAN INC.
    Inventors: Tsukasa KITAHARA, Ryota TANAKA, Ryo TAKEI, Yuki EJIMA
  • Publication number: 20230076576
    Abstract: A learning device includes a memory; and a processor configured to execute answer generation means for taking data including text, and a question text related to the data as inputs; creating, by using a model parameter of a neural network, a token sequence that takes visual information in the data into consideration, and generating an answer text to the question text, based on the created token sequence; and learning means for learning the model parameter by using the answer text and a correct answer text to the question text.
    Type: Application
    Filed: December 9, 2020
    Publication date: March 9, 2023
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Kyosuke NISHIDA, Ryota TANAKA, Sen YOSHIDA, Junji TOMITA
  • Publication number: 20230074093
    Abstract: A semiconductor device includes a semiconductor base body, and a first main electrode and a second main electrode provided on the semiconductor base body. The semiconductor base body includes a drift region of a first conductivity type through which a main current flows, a column region of a second conductivity type arranged adjacent to the drift region in parallel to a current passage of the main current, a second electrode-connection region of the first conductivity type electrically connected to the second main electrode, and a low-density electric-field relaxation region of the first conductivity type having a lower impurity concentration than the drift region and arranged between the second electrode-connection region and the column region.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 9, 2023
    Applicants: NISSAN MOTOR CO., LTD., RENAULT s.a.s.
    Inventors: Toshiharu MARUI, Tetsuya HAYASHI, Keiichiro NUMAKURA, Wei NI, Ryota TANAKA, Keisuke TAKEMOTO
  • Publication number: 20230013819
    Abstract: A semiconductor device includes a semiconductor base body, and a first main electrode and a second main electrode provided on the semiconductor base body. The semiconductor base body includes a drift region of a first conductivity type through which a main current flows, a column region of a second conductivity type arranged adjacent to the drift region in parallel to a current passage of the main current, a second electrode-connection region of the first conductivity type electrically connected to the second main electrode, and a low-density electric-field relaxation region of the first conductivity type having a lower impurity concentration than the drift region and arranged between the second electrode-connection region and the column region.
    Type: Application
    Filed: September 14, 2022
    Publication date: January 19, 2023
    Applicants: NISSAN MOTOR CO., LTD., RENAULT s.a.s.
    Inventors: Toshiharu MARUI, Tetsuya HAYASHI, Keiichiro NUMAKURA, Wei NI, Ryota TANAKA, Keisuke TAKEMOTO
  • Patent number: 11557674
    Abstract: A semiconductor device includes: a substrate (10); a semiconductor layer (20) disposed on a main surface of this substrate (10); and a first main electrode (30) and a second main electrode (40), which are disposed on the substrate (10) separately from each other with the semiconductor layer (20) sandwiched therebetween and are individually end portions of a current path of a main current flowing in an on-state. The semiconductor layer (20) includes: a first conductivity-type drift region (21) through which a main current flows; a second conductivity-type column region (22) that is disposed inside the drift region (21) and extends in parallel to a current path; and an electric field relaxation region (23) that is disposed in at least a part between the drift region (21) and the column region (22) and is either a low-concentration region in which an impurity concentration is lower than in the same conductivity-type adjacent region or a non-doped region.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: January 17, 2023
    Assignees: NISSAN MOTOR CO., LTD., RENAULT s.a.s.
    Inventors: Toshiharu Marui, Tetsuya Hayashi, Keiichiro Numakura, Wei Ni, Ryota Tanaka, Keisuke Takemoto
  • Patent number: 11557647
    Abstract: A semiconductor device includes: a drift region of a first conductive type including a contact section and extension sections extending along the main surface of a substrate; column regions of a second conductive type which alternate with the extension sections in a perpendicular direction to the extension direction of the extension sections and each includes an end connecting to the contact section; a well region of a second conductive type which connects to the other end of each column region and tips of the extension sections; and electric field relaxing electrodes which are provided above at least some of residual pn junctions with an insulating film interposed therebetween. Herein, the residual pn junctions are pn junctions other than voltage holding pn junctions formed in interfaces between the extension sections and the column regions.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: January 17, 2023
    Assignee: NISSAN MOTOR CO., LTD.
    Inventors: Toshiharu Marui, Tetsuya Hayashi, Keiichiro Numakura, Wei Ni, Ryota Tanaka, Keisuke Takemoto