Patents by Inventor Ryozo Maeno

Ryozo Maeno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4947478
    Abstract: An interprocessor link system has a plurality of processor units having a common input/output device. The system further has at least one flip-flop for setting a processor mode so as to switch between the plurality of processors, and gates for releasing the reset state of one of the processor units in accordance with a value of an output from the flip-flop. One processor unit is set by using the flip-flop. The active processor unit occupies a bus (address/data/status control) commonly used with other processor units. A change in state of the flip-flop is detected by an additional shift register and an exclusive OR gate, and an initialize signal is generated for a predetermined period of time to initialize hardware.
    Type: Grant
    Filed: March 11, 1988
    Date of Patent: August 7, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Ryozo Maeno