Patents by Inventor Ryuichiro Ohyama

Ryuichiro Ohyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8214679
    Abstract: A multi-core processor system includes: a plurality of processor cores; a power supply unit that stops supplying or supplies power to each of the processor cores individually; and a thread queue that stores threads that the multi-core processor system causes the processor cores to execute. Each of the processor cores includes: a power-supply stopping unit that causes the power supply unit to stop power supply to an own processor core when a number of threads stored in the thread queue is equal to or smaller than a first threshold; and a power-supply resuming unit that causes the power supply unit to resume power supply to the other stopped processor cores when the number of threads stored in the thread queue exceeds a second value equal to or lager than the first threshold.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: July 3, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuji Ishikawa, Toshiki Kizu, Ryuichiro Ohyama
  • Publication number: 20100299541
    Abstract: A multi-core processor system includes: a plurality of processor cores; a power supply unit that stops supplying or supplies power to each of the processor cores individually; and a thread queue that stores threads that the multi-core processor system causes the processor cores to execute. Each of the processor cores includes: a power-supply stopping unit that causes the power supply unit to stop power supply to an own processor core when a number of threads stored in the thread queue is equal to or smaller than a first threshold; and a power-supply resuming unit that causes the power supply unit to resume power supply to the other stopped processor cores when the number of threads stored in the thread queue exceeds a second value equal to or lager than the first threshold.
    Type: Application
    Filed: November 2, 2009
    Publication date: November 25, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuji Ishikawa, Toshiki Kizu, Ryuichiro Ohyama
  • Patent number: 7707386
    Abstract: A design apparatus for designing a processor re-configurable for an application, includes an analysis unit that analyzes the content of a program to be executed by the processor; a hardware extension unit that searches the program for a part of the program allowing hardware extension in accordance with the analysis results by the analysis unit and generates hardware extension information for the searched part; an extended instruction definition unit that searches the program for a part allowing use of an extended instruction in accordance with the analysis results by the analysis unit and generates definition of an extended instruction for the searched part; and a performance estimation unit that estimates whether or not the performance of the processor satisfies a target performance using at least one of the hardware extension information generated by the hardware extension unit and the definition of the extended instruction generated by the extended instruction definition unit.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: April 27, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuyoshi Kohno, Atsushi Mizuno, Atsushi Masuda, Ryuichiro Ohyama, Yutaka Ota
  • Publication number: 20080104365
    Abstract: A design apparatus for designing a processor re-configurable for an application, includes an analysis unit that analyzes the content of a program to be executed by the processor; a hardware extension unit that searches the program for a part of the program allowing hardware extension in accordance with the analysis results by the analysis unit and generates hardware extension information for the searched part; an extended instruction definition unit that searches the program for a part allowing use of an extended instruction in accordance with the analysis results by the analysis unit and generates definition of an extended instruction for the searched part; and a performance estimation unit that estimates whether or not the performance of the processor satisfies a target performance using at least one of the hardware extension information generated by the hardware extension unit and the definition of the extended instruction generated by the extended instruction definition unit.
    Type: Application
    Filed: December 17, 2007
    Publication date: May 1, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuhyoshi Kohno, Atsushi Mizuno, Atsushi Masuda, Ryuichiro Ohyama, Yutaka Ota
  • Patent number: 7340692
    Abstract: In this disclosure, based on change item definition information concerning system LSI development and design, software used for development and design of a system LSI that contains a processor having optional instructions defined therein is operated, and system LSI hardware description, verification environment and a development and design tools are generated, thus making it possible to develop a system LSI optimal to an application within a short period.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: March 4, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Matsui, Atsushi Mizuno, Ryuichiro Ohyama, Megumi Tangoda, Katsuya Uchida
  • Patent number: 7337301
    Abstract: A design apparatus for designing a configurable processor for an application, includes an analysis unit that analyzes the content of a program to be executed by the processor; a hardware extension unit that searches the program for a part of the program allowing hardware extension in accordance with the analysis results by the analysis unit and generates hardware extension information for the searched part; an extension instruction definition unit that searches the program for a part allowing use of an extension instruction in accordance with the analysis results by the analysis unit and generates definition of an extension instruction for the searched part; and a performance estimation unit that estimates whether or not the performance of the processor satisfies a target performance using at least one of the hardware extension information generated by the hardware extension unit and the definition of the extension instruction generated by the extension instruction definition unit.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: February 26, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuyoshi Kohno, Atsushi Mizuno, Atsushi Masuda, Ryuichiro Ohyama, Yutaka Ota
  • Publication number: 20070250827
    Abstract: A program development supporting apparatus for generating, displaying, and editing section locating of a function and memory locating of a section manually or automatically includes: a function calling information input unit configured to extract call relation of a function from a source file; a link configuration file input unit configured to extract locating information on an absolute section from a configuration file used when linking; a section editing unit configured to place the function in one of a relocatable section and the absolute section; a function locating configuration file output unit configured to output the locating information on the function as a function locating configuration file; and a link configuration file output unit configured to output the locating information on the relocatable section and the absolute section.
    Type: Application
    Filed: April 20, 2007
    Publication date: October 25, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ryuichiro Ohyama, Seiji Hayashida
  • Publication number: 20070061763
    Abstract: A system LSI development environment generating method includes a compiler customizing section which generates a compiler from a configuration designation file, an assembler customizing section which generates an assembler, and a simulator generating section which generates a simulator. The configuration designation file contains a designation of hardware which executes instructions.
    Type: Application
    Filed: November 6, 2006
    Publication date: March 15, 2007
    Inventors: Nobu Matsumoto, Ryuichiro Ohyama, Katsuya Uchida
  • Patent number: 7168060
    Abstract: A system LSI development environment generating method includes a compiler customizing section which generates a compiler from a configuration designation file, an assembler customizing section which generates an assembler, and a simulator generating section which generates a simulator. The configuration designation file contains a designation of hardware which executes instructions.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: January 23, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobu Matsumoto, Ryuichiro Ohyama, Katsuya Uchida
  • Publication number: 20050193184
    Abstract: A design apparatus for designing a configurable processor for an application, includes an analysis unit that analyzes the content of a program to be executed by the processor; a hardware extension unit that searches the program for a part of the program allowing hardware extension in accordance with the analysis results by the analysis unit and generates hardware extension information for the searched part; an extension instruction definition unit that searches the program for a part allowing use of an extension instruction in accordance with the analysis results by the analysis unit and generates definition of an extension instruction for the searched part; and a performance estimation unit that estimates whether or not the performance of the processor satisfies a target performance using at least one of the hardware extension information generated by the hardware extension unit and the definition of the extension instruction generated by the extension instruction definition unit.
    Type: Application
    Filed: January 28, 2005
    Publication date: September 1, 2005
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuyoshi Kohno, Atsushi Mizuno, Atsushi Masuda, Ryuichiro Ohyama, Yutaka Ota
  • Publication number: 20050076314
    Abstract: In this disclosure, based on change item definition information concerning system LSI development and design, software used for development and design of a system LSI that contains a processor having optional instructions defined therein is operated, and system LSI hardware description, verification environment and a development and design tools are generated, thus making it possible to develop a system LSI optimal to an application within a short period.
    Type: Application
    Filed: July 18, 2003
    Publication date: April 7, 2005
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Nobuo Matsui, Atsushi Mizuno, Ryuichiro Ohyama, Megumi Tangoda, Katsuya Uchida
  • Publication number: 20030204819
    Abstract: A system LSI development environment generating method includes a compiler customizing section which generates a compiler from a configuration designation file, an assembler customizing section which generates an assembler, and a simulator generating section which generates a simulator. The configuration designation file contains a designation of hardware which executes instructions.
    Type: Application
    Filed: July 19, 2002
    Publication date: October 30, 2003
    Inventors: Nobu Matsumoto, Ryuichiro Ohyama, Katsuya Uchida
  • Patent number: 6634017
    Abstract: In this disclosure, based on change item definition information concerning system LSI development and design, software used for development and design of a system LSI that contains a processor having optional instructions defined therein is operated, and system LSI hardware description, verification environment and a development and design tools are generated, thus making it possible to develop a system LSI optimal to an application within a short period.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: October 14, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Matsui, Atsushi Mizuno, Ryuichiro Ohyama, Megumi Tangoda, Katsuya Uchida
  • Publication number: 20020147957
    Abstract: In this disclosure, based on change item definition information concerning system LSI development and design, software used for development and design of a system LSI that contains a processor having optional instructions defined therein is operated, and system LSI hardware description, verification environment and a development and design tools are generated, thus making it possible to develop a system LSI optimal to an application within a short period.
    Type: Application
    Filed: May 29, 2001
    Publication date: October 10, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Nobuo Matsui, Atsushi Mizuno, Ryuichiro Ohyama, Megumi Tangoda, Katsuya Uchida