Abstract: To provide an oven controlled crystal oscillator which can keep constant the temperature of a quartz resonator housed within a thermostatic oven, thereby ensuring stable operation of the quartz resonator. An oven controlled crystal oscillator has a control system for exercising control so that the temperature of a quartz resonator becomes a target temperature Ttarg of a predetermined fixed value. The quartz resonator is housed within a thermostatic oven which is configured to compare a set temperature Tr and a measured temperature Tic based on an outside air temperature measured by a temperature sensor and which is controlled so that a difference between both temperatures is narrowed. The quartz resonator has characteristics influenced by an environmental temperature.

Abstract: To provide an oven controlled crystal oscillator which can keep constant the temperature of a quartz resonator housed within a thermostatic oven, thereby ensuring stable operation of the quartz resonator. An oven controlled crystal oscillator has a control system for exercising control so that the temperature of a quartz resonator becomes a target temperature Ttarg of a predetermined fixed value. The quartz resonator is housed within a thermostatic oven which is configured to compare a set temperature Tr and a measured temperature Tic based on an outside air temperature measured by a temperature sensor and which is controlled so that a difference between both temperatures is narrowed. The quartz resonator has characteristics influenced by an environmental temperature.

Abstract: Each of varicaps 50A to 50C configured to be connected in parallel is an MOS capacitor III produced under a common and single process condition. Each of the varicaps 50A to 50C has a conductor layer serving as a second electrode and formed via a capacitance insulating film on a first conductivity-type semiconductor substrate serving as a first electrode, and a second conductivity-type impurity region formed near a surface in proximity to a region of the first conductivity-type semiconductor substrate opposing the conductor layer. Each of the varicaps 50A to 50C is configured such that a capacitance value as a capacitance element between the first conductivity-type semiconductor substrate serving as the first electrode and the conductor layer serving as the second electrode is changed by applying a control voltage to the conductor layer while applying any one of a plurality of types of direct-current voltages having different voltages to the second conductivity-type impurity region.

Abstract: Each of varicaps 50A to 50C configured to be connected in parallel is an MOS capacitor III produced under a common and single process condition. Each of the varicaps 50A to 50C has a conductor layer serving as a second electrode and formed via a capacitance insulating film on a first conductivity-type semiconductor substrate serving as a first electrode, and a second conductivity-type impurity region formed near a surface in proximity to a region of the first conductivity-type semiconductor substrate opposing the conductor layer. Each of the varicaps 50A to 50C is configured such that a capacitance value as a capacitance element between the first conductivity-type semiconductor substrate serving as the first electrode and the conductor layer serving as the second electrode is changed by applying a control voltage to the conductor layer while applying any one of a plurality of types of direct-current voltages having different voltages to the second conductivity-type impurity region.

Abstract: A voltage regulator comprises an N type depletion MOS transistor having a drain connected to the positive electrode side of a power supply, a source connected to a stabilizing capacitor, and a gate receiving a constant reference voltage, and has an output terminal at the source of the N type depletion MOS transistor. In this simple circuit configuration, the voltage regulator can markedly reduce a noise carried on an output voltage.

Abstract: A semiconductor integrated circuit that includes a circuit element with a reduced parasitic capacitance and has a short start-up time. A well of the different type of conduction from that of the substrate is formed in the area of the surface of the semiconductor substrate under the circuit element. A constant voltage, which biases the junction between the well and the semiconductor substrate in a reverse direction, is applied to the well through a resistor having a higher impedance compared with the impedance of the capacitance of the reverse-biased junction between the well and the substrate at the frequency of the signal applied to the circuit element.

Abstract: A semiconductor integrated circuit that has an output circuit in which an output-stage operating voltage lower than a power supply voltage is applied to an output stage is provided. Even when the power supply voltage is lowered, a sufficient output signal amplitude can be obtained. An increase in circuit scale can be prevented and the power consumption can be reduced. An output-stage operating voltage supply source, including an N-channel MOS transistor having a first threshold voltage, applies an operating voltage lower than a power supply voltage to the output stage of the output circuit. A drive-circuit operating voltage supply source, including an N-channel MOS transistor having a second threshold voltage lower than the first threshold voltage, applies a drive-circuit operating voltage higher than the output-stage operating voltage to a drive circuit.

Abstract: The method of manufacturing a crystal oscillator that is compensated for temperature with low-cost, and a crystal oscillator that is compensated for temperature by the method is disclosed. A plurality of crystal oscillators are manufactured by preparing a compensation circuit that generates a common compensation voltage in accordance with a predetermined compensation curve expressed by a quintic polynomial of an ambient temperature; and manufacturing each of the plurality of crystal oscillators by integrating the compensation circuit with a voltage controlled oscillation circuit including a crystal resonator, the common compensation voltage generated by the compensation circuit being supplied to the voltage controlled oscillation circuit so that the temperature characteristic of the crystal resonator is compensated.

Abstract: A semiconductor integrated circuit that has an output circuit in which an output-stage operating voltage lower than a power supply voltage is applied to an output stage is provided. Even when the power supply voltage is lowered, a sufficient output signal amplitude can be obtained. An increase in circuit scale can be prevented and the power consumption can be reduced. An output-stage operating voltage supply source, including an N-channel MOS transistor having a first threshold voltage, applies an operating voltage lower than a power supply voltage to the output stage of the output circuit. A drive-circuit operating voltage supply source, including an N-channel MOS transistor having a second threshold voltage lower than the first threshold voltage, applies a drive-circuit operating voltage higher than the output-stage operating voltage to a drive circuit.

Abstract: A semiconductor integrated circuit that includes a circuit element with a reduced parasitic capacitance and has a short start-up time. A well of the different type of conduction from that of the substrate is formed in the area of the surface of the semiconductor substrate under the circuit element. A constant voltage, which biases the junction between the well and the semiconductor substrate in a reverse direction, is applied to the well through a resistor having a higher impedance compared with the impedance of the capacitance of the reverse-biased junction between the well and the substrate at the frequency of the signal applied to the circuit element.

Abstract: A semiconductor integrated contains a first MOS transistor of a first conductivity type formed on a surface of a semiconductor substrate, and a second MOS transistor of the first conductivity type having a drain-source breakdown voltage lower than that of the first MOS transistor. The second MOS transistor is used as an anti-fuse, which can be changed to a conductive state with a low writing voltage that does not damage the first MOS transistor. The second MOS transistor is fabricated such that a concentration of a second conductivity type impurity in at least a portion of the channel region adjacent to the drain region is higher than that in a corresponding portion of the first MOS transistor.

Abstract: A semiconductor integrated contains a first MOS transistor of a first conductivity type formed on a surface of a semiconductor substrate, and a second MOS transistor of the first conductivity type having a drain-source breakdown voltage lower than that of the first MOS transistor. The second MOS transistor is used as an anti-fuse, which can be changed to a conductive state with a low writing voltage that does not damage the first MOS transistor. The second MOS transistor is fabricated such that a concentration of a second conductivity type impurity in at least a portion of the channel region adjacent to the drain region is higher than that in a corresponding portion of the first MOS transistor.

Abstract: A semiconductor integrated contains a first MOS transistor of a first conductivity type formed on a surface of a semiconductor substrate, and a second MOS transistor of the first conductivity type having a drain-source breakdown voltage lower than that of the first MOS transistor. The second MOS transistor is used as an anti-fuse, which can be changed to a conductive state with a low writing voltage that does not damage the first MOS transistor. The second MOS transistor is fabricated such that a concentration of a second conductivity type impurity in at least a portion of the channel region adjacent to the drain region is higher than that in a corresponding portion of the first MOS transistor.

Abstract: A semiconductor integrated contains a first MOS transistor of a first conductivity type formed on a surface of a semiconductor substrate, and a second MOS transistor of the first conductivity type having a drain-source breakdown voltage lower than that of the first MOS transistor. The second MOS transistor is used as an anti-fuse, which can be changed to a conductive state with a low writing voltage that does not damage the first MOS transistor. The second MOS transistor is fabricated such that a concentration of a second conductivity type impurity in at least a portion of the channel region adjacent to the drain region is higher than that in a corresponding portion of the first MOS transistor.