Patents by Inventor Ryuji Kohno

Ryuji Kohno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6955870
    Abstract: A method of manufacturing a semiconductor device has forming process for forming a semiconductor device on a major surface of a wafer, and testing process for testing defect of the semiconductor device formed on the wafer. The testing process includes a step bringing a testing apparatus into contact with test electrodes of the semiconductor device. The testing apparatus has a contactor including a plurality of probes that come into contact with the test electrodes of the semiconductor device to be tested, and secondary electrodes electrically connected to the probes and disposed on a surface opposite to the probes; a substrate on which electrodes electrically communicated to the contactor by a conducting device. The conducting device is so formed that stress applied to the conducting device in the state where the probes are in contact with the test electrodes is larger than stress applied to the conducting device in the state where the probes are not in contact with the test electrodes.
    Type: Grant
    Filed: October 17, 2002
    Date of Patent: October 18, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Ryuji Kohno, Hideo Miura, Masatoshi Kanamaru, Hiroya Shimizu, Hideyuki Aoki
  • Patent number: 6952110
    Abstract: A method of manufacturing a semiconductor device has forming process for forming a semiconductor device on a major surface of a wafer, and testing process for testing defect of the semiconductor device. The testing process includes bringing a testing apparatus into contact with test electrodes of the semiconductor device. The testing apparatus has a contactor including probes that come into contact with the test electrodes of the semiconductor device, and secondary electrodes electrically connected to the probes and disposed on a surface opposite to the probes; and a substrate on which electrodes electrically communicated to the contactor by a conducting device. The conducting device is so formed that stress applied to the conducting device in the state where the probes are in contact with the test electrodes is larger than stress applied to the conducting device in the state where the probes are not in contact with the test electrodes.
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: October 4, 2005
    Assignee: Renesas Technology Corporation
    Inventors: Ryuji Kohno, Hideo Miura, Masatoshi Kanamaru, Hiroya Shimizu, Hideyuki Aoki
  • Publication number: 20050184919
    Abstract: A slot antenna includes an insulation substrate, a metal layer provided on the insulation substrate, a slot formed in the metal layer, and a feeding part connected to the metal layer. The slot is symmetric with respect to a centerline. When an x-y coordinate system is defined on the metal layer so that the y-axis is the symmetric line, the origin is the center of the slot antenna, and the x-axis through the origin is perpendicular to the y-axis, the width of the slot in the direction of the y-axis increasing in proportion to the absolute value of the x-axis.
    Type: Application
    Filed: December 29, 2004
    Publication date: August 25, 2005
    Applicant: NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY
    Inventors: Kamya Yekeh Yazdandoost, Ryuji Kohno
  • Publication number: 20050146480
    Abstract: A printed antenna includes a dielectric substrate having a pair of printed antenna elements to form a dipole antenna. On an antenna plane, an xy axis system is defined so that an origin is defined at a center of location of the antenna elements, and an x axis is set in a direction that the antenna elements are arranged, a y axis is set in the direction perpendicular to the x axis, and a size of the antenna elements in the direction of the y axis become gradually larger according to the x axis changing in an outer direction. Each of the antenna elements has an impedance matching part at a feeding side of the antenna elements. The printed antenna can be used in an ultra wide-band frequency, and is small profile, is light weight and low in cost.
    Type: Application
    Filed: August 26, 2004
    Publication date: July 7, 2005
    Applicant: National Institute of Information and Communications Technology
    Inventors: Kamya Yazdandoost, Ryuji Kohno
  • Publication number: 20050105649
    Abstract: This invention has as its object to implement the constitution of a receiver that receives signals sent by performing multi-valued pulse modulation and performs iterative decoding. The constitution includes: (1) a bank of pulse correlators that achieves correlation with all predetermined sent pulse waveforms, (2) a pulse demapper that calculates the log likelihood ratio for each bit of the interleaved code word from said pulse correlator outputs and a priori information for each bit, (3) a deinterleaver that performs deinterleaving on the output from said pulse demapper, (4) a decoder that calculates likelihood information for the deinterleaved code word bits and information bits, respectively, (5) an interleaver that interleaves the output of the decoder in the same manner as on the sending side, and (6) a feedback circuit that provides feedback of the output of said interleaver as a priori probability to the pulse demapper.
    Type: Application
    Filed: September 9, 2004
    Publication date: May 19, 2005
    Applicant: NATL. INSTITUTE OF INFO. AND COMMUNICATIONS TECH.
    Inventors: Kenichi Takizawa, Ryuji Kohno
  • Patent number: 6885208
    Abstract: A semiconductor device includes a quadrangular semiconductor substrate and a self test circuit formed on the semiconductor substrate. A plurality of pads are formed on the semiconductor substrate, which pads are coupled at least to the self test circuit. The semiconductor substrate includes four rectangular or square regions which each include a respective corner of the quadrangle, and at least two of the pads are respectively located on diagonally opposite ones of the regions from one another.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: April 26, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Toshio Miyatake, Tatsuya Nagata, Hiroya Shimizu, Ryuji Kohno, Hideyuki Aoki
  • Patent number: 6880534
    Abstract: An evaporative fuel processing system for processing evaporative fuel generated a fuel tank. A canister temporarily stores evaporative fuel generated in the fuel tank. A charge passage connects the fuel tank and the canister. A first purge passage connects the canister and an intake pipe of an internal combustion engine having a turbocharger. A purge control valve is provided in the first purge passage for adjusting a flow rate of gases flowing through the first purge passage. A second purge passage connects a downstream side of the purge control valve of the first purge passage and an upstream side of the turbocharger of the intake pipe. A jet pump is mounted on the second purge passage. A pressurized air supply passage supplies air pressurized by the turbocharger to the jet pump. The jet pump includes a nozzle for discharging the pressurized air supplied through the pressurized air supply passage.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: April 19, 2005
    Assignee: Honda Motor Co., Ltd.
    Inventors: Koichi Yoshiki, Kazuhiko Imamura, Ryuji Kohno, Mahito Shikama, Toshiichi Terakado, Kenichi Maeda, Masayuki Wakui
  • Publication number: 20050073323
    Abstract: In an apparatus for measuring thickness of a thin film, which is formed through a conductor, preventing the measurement from an error due to the curve or bend on a substrate surface or a moving surface of a stage, but without necessity of a large-scaled facility, an electric filed is applied between a probe 10 and a stage 8, so as to obtain an electrostatic capacitance of the substrate 3, an electrostatic capacitance of an insulating film, which is formed between the substrate 3, and an electrostatic capacitance defined starting from the substrate 3 to the thin film 4. The electrostatic capacitance between the substrate 3 and the thin film 4 is measured at plural numbers of places covering over the entire surface of the thin film 4. The probe 10 is so supported that the contact load ā€œPā€ comes to be constant, by the probe 10 onto the thin film 4. A contact area of the probe 10 between the thin film 4 is calculated out through a predetermined equation, assuming the load ā€œPā€ is constant.
    Type: Application
    Filed: July 30, 2004
    Publication date: April 7, 2005
    Inventors: Ryuji Kohno, Tatsuya Nagata, Naoki Watase, Michihiro Watanabe
  • Patent number: 6876073
    Abstract: A semiconductor device superior in heat dissipation in which the exchanging of chips can be readily performed is realized by mounting, through means distinct from bonding or connecting, a LSI chip on an interconnection substrate having substantially no difference in thermal conductivity between the LSI chip and the substrate. The semiconductor device is provided on an interconnection substrate 6 with electrode terminals 7 of cantilever structure, an interconnection layer 8 for electrical connection among the electrode terminals 7, an interconnection layer 12 for electrical connection to outer portions, and fitting portions 9 formed in a cover 5, the substrate 6 and the cover 5 being connected by the fitting portions. The chips 1 and 2 are electrically contacted through the terminals 7 without using any bonding or connecting, so that the mounting and detachment of the cover 5 and the substrate can be readily performed.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: April 5, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Hideo Miura, Ryuji Kohno
  • Patent number: 6868109
    Abstract: A receiving system or a received radio-wave estimation method is provided that can maintain received field strengths at a nearly uniform level under multipath conditions. The antenna switch can select outputs of four antennas at high speed. The high-frequency amplifier amplifies the output of the antenna switch and the demodulator demodulates amplified signals. The matched filter bank, surrounded with chain lines, receives a demodulated signal, for example, the I-phase component. In the matched filter bank, the phase shifter shifts respective signals output from four delay elements. The adder synthesizes the phase-shifted signals and then supplies the maximum matched output to the maximum level selector.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: March 15, 2005
    Assignee: Futaba Corporation
    Inventors: Ryuji Kohno, Satoru Ishii
  • Patent number: 6864695
    Abstract: Since each wiring line is formed on one surface of the associated beam at a prescribed width over the entire length of the beam, the beam has the same sectional shape taken in the width direction at any point along an arbitrary longitudinal direction of the beam. As a result, the second moment of area, which is determined by the shapes of the beam and the wiring line, is uniform. This prevents a problem of the curvature of a beam varying locally when the beam is bent by a prescribed amount due to contact of the probe with a pad of a subject body. This, in turn, prevents local concentration of stress in the beams and thereby prevents breakage of the beam. Therefore, the probe structure can be miniaturized while the strength of the beams is kept at a required level, whereby a semiconductor device testing apparatus capable of accommodating many probes can be realized.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: March 8, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Ryuji Kohno, Hideo Miura, Masatoshi Kanamaru, Hiroya Shimizu, Naoto Ban
  • Patent number: 6864568
    Abstract: A packaging device for holding thereon a plurality of semiconductor devices to be inspected on an inspection device including a probe to be electrically connected to an electrode of each of the semiconductor devices, comprises, holes for respectively receiving detachably therein the semiconductor devices to keep a positional relationship among the semiconductor devices and a positional relationship between the packaging device and each of the semiconductor devices constant with a spacing between the semiconductor devices, in a direction perpendicular to a thickness direction of the semiconductor devices, and electrically conductive members adapted to be connected respectively to the electrodes of the semiconductor devices, and extending to an exterior of the packaging device so that the probe is connected to each of the electrically conductive members.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: March 8, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Ryuji Kohno, Hiroya Shimizu, Masatoshi Kanamaru, Atsushi Hosogane, Toshio Miyatake, Hideo Miura, Tatsuya Nagata, Yoshishige Endo, Masaaki Namba, Yuji Wada
  • Patent number: 6862442
    Abstract: A receiver includes a phased array antenna and a demodulator. The phased array antenna includes first and second antenna elements and a phase shifter for shifting the phase of a signal received by the first antenna element by a predetermined amount. The demodulator includes a first junction circuit which receives a local signal and a signal output from the phase shifter and which generates a plurality of signals having a phase difference; a second junction circuit which receives a local signal and a signal output from the second antenna element and which generates a plurality of signals having a phase difference; signal combiners for combining corresponding signals output from the two junction circuits; power detectors for detecting the signal levels of the output signals of the signal combiners; and a converter for converting the outputs signals of the power detectors so as to obtain IQ signals.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: March 1, 2005
    Assignee: Sony Corporation
    Inventors: Yukitoshi Sanada, Masayoshi Abe, Ryuji Kohno
  • Publication number: 20050032252
    Abstract: A method of manufacturing a semiconductor device has forming process for forming a semiconductor device on a major surface of a wafer, and testing process for testing defect of the semiconductor device formed on the wafer. The testing process includes a step bringing a testing apparatus into contact with test electrodes of the semiconductor device. The testing apparatus has a contactor including a plurality of probes that come into contact with the test electrodes of the semiconductor device to be tested, and secondary electrodes electrically connected to the probes and disposed on a surface opposite to the probes; a substrate on which electrodes electrically communicated to the contactor by a conducting device. The conducting device is so formed that stress applied to the conducting device in the state where the probes are in contact with the test electrodes is larger than stress applied to the conducting device in the state where the probes are not in contact with the test electrodes.
    Type: Application
    Filed: September 3, 2004
    Publication date: February 10, 2005
    Applicant: Renesas Technology Corporation
    Inventors: Ryuji Kohno, Hideo Miura, Masatoshi Kanamaru, Hiroya Shimizu, Hideyuki Aoki
  • Publication number: 20050011498
    Abstract: An evaporative fuel processing system for processing evaporative fuel generated a fuel tank. A canister temporarily stores evaporative fuel generated in the fuel tank. A charge passage connects the fuel tank and the canister. A first purge passage connects the canister and an intake pipe of an internal combustion engine having a turbocharger. A purge control valve is provided in the first purge passage for adjusting a flow rate of gases flowing through the first purge passage. A second purge passage connects a downstream side of the purge control valve of the first purge passage and an upstream side of the turbocharger of the intake pipe. A jet pump is mounted on the second purge passage. A pressurized air supply passage supplies air pressurized by the turbocharger to the jet pump. The jet pump includes a nozzle for discharging the pressurized air supplied through the pressurized air supply passage.
    Type: Application
    Filed: June 21, 2004
    Publication date: January 20, 2005
    Inventors: Koichi Yoshiki, Kazuhiko Imamura, Ryuji Kohno, Mahito Shikama, Toshiichi Terakado, Kenichi Maeda, Masayuki Wakui
  • Patent number: 6828810
    Abstract: A semiconductor device testing apparatus is realized, which allows contactors to be positioned throughout the wafer surface highly accurately for uniform contact, testing a large-sized wafer, and cost reduction. A plurality of divided contactor blocks is formed with a positioning groove. The groove is used to position the plurality of contactor blocks with a positioning frame. Because the contactor blocks are divided into plurals, it is less likely that a partial surface distortion affects other portions to impair surface flatness as compared with the case where a plurality of non-divided contactors is formed integrally, and the plurality of contactor blocks can be brought into contact with a wafer to be tested uniformly. Additionally, even though abnormality is generated in a part of the contactor blocks, only the part of the contactor blocks is replaced. Therefore, replacement costs can be reduced as compared with the case where a plurality of non-divided contactors is formed integrally.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: December 7, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Masatoshi Kanamaru, Yoshishige Endo, Takanori Aono, Ryuji Kohno, Hiroya Shimizu, Naoto Ban, Hideyuki Aoki
  • Patent number: 6822508
    Abstract: A high-performance demodulator for use in UWB (Ultra WideBand) multiple-access communication is disclosed. In a communication device, the correlation between a received signal corresponding to signals transmitted from a plurality of communication terminals by means of UWB (Ultra WideBand) communication and pulses at possible positions in a signal transmitted from each communication terminal is calculated. On the basis of the resultant calculated correlation, and taking into account interference among the signals transmitted from the communication terminals, the received signal is demodulated into original data issued by the respective communication terminals.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: November 23, 2004
    Assignee: Sony Corporation
    Inventors: Young C. Yoon, Ryuji Kohno
  • Patent number: 6823181
    Abstract: The universal platform for the SDR of the present invention employs the direct conversion approach with the n-port MMIC followed by reconfigurable reprogrammable devices such as DSP's or FPGA's. The universal platform is based on the linear operation of the devices. Thus, the DC offset problem may be solved. It is also possible to support very wide bandwidths compared with conventional I/Q receivers. Therefore, the present universal platform is suitable for multimode and multiband communications.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: November 23, 2004
    Assignees: Sony Corporation, Sony International (Europe) GmbH
    Inventors: Ryuji Kohno, Masayoshi Abe, Noboru Sasho, Shinichiro Haruyama, Robert Henry Morelos-Zaragoza, Francis Swarts, Pieter Van Rooyen, Yukitoshi Sanada, Lachlan Bruce Michael, Hamid Amir-Alikhani, Veselin Brankovic
  • Patent number: 6784835
    Abstract: An array antenna comprising a plurality of antenna elements, multipliers for multiplying coefficients with transmission or reception signal and a calculator for calculating the coefficients for each multiplier. The calculator generates the coefficients in a proposed method such that the beampattern of the array antenna has a flat top mainlobe with an adjustable beamwidth and a predetermined sidelobe ratio.
    Type: Grant
    Filed: December 2, 2002
    Date of Patent: August 31, 2004
    Assignee: Sony Corporation
    Inventors: Ryuji Kohno, Abreu Giuseppe
  • Patent number: 6778147
    Abstract: To realize an antenna apparatus capable of measuring a calibration factor accurately and further, capable of estimating an arrival direction of a received signal by composing a calibration circuit by using a directional coupler. The antenna system includes L-number of branch units, a calibration circuit and an operating unit. Each directional coupler composing the calibration circuit is structured symmetrically. Measuring the received signals Yti, i−1 and Yti, i+1 of i−1th and i+1th receivers, respectively, when an ith transmitter transmits a signal, on the basis of the first branch unit, the operating unit calculates a calibration factor at the ith branch unit as Hi=T1Ri/(TiR1)=Yt12Yt23−Yti−1,i/Yt21Yt32−Yti,i−1.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: August 17, 2004
    Assignee: Sony Corporation
    Inventors: Yukitoshi Sanada, Ryuji Kohno