Patents by Inventor Ryuji Ueda

Ryuji Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10672928
    Abstract: A metal foil pattern layered body of the invention includes a base member; a metal foil including a metal pattern formed by an opening and a metal portion; and a protuberance provided at the metal foil and at a boundary between the opening and the metal portion.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: June 2, 2020
    Assignee: DSM IP ASSETS B.V.
    Inventors: Koichi Kumai, Ryuji Ueda, Takao Tomono, Takehito Tsukamoto
  • Patent number: 10651320
    Abstract: A method of manufacturing a circuit board includes: forming a plurality of metal electrodes so as to be separated from each other on a holding sheet by cutting a metal foil held on the holding sheet to remove a portion of the metal foil; forming adhesive layers on surfaces of the plurality of metal electrodes; adhering the adhesive layers to a base material by closely contacting the adhesive layers with the base material; and transcribing the adhesive layers and the plurality of metal electrodes onto the base material by detaching the holding sheet from the plurality of metal electrodes.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: May 12, 2020
    Assignee: DSM IP ASSETS B.V.
    Inventors: Koichi Kumai, Ryuji Ueda, Kentaro Kubota, Shigeki Kudo, Minoru Kawasaki
  • Publication number: 20190288127
    Abstract: A method of manufacturing a circuit board includes: forming a plurality of metal electrodes so as to be separated from each other on a holding sheet by cutting a metal foil held on the holding sheet to remove a portion of the metal foil; forming adhesive layers on surfaces of the plurality of metal electrodes; adhering the adhesive layers to a base material by closely contacting the adhesive layers with the base material; and transcribing the adhesive layers and the plurality of metal electrodes onto the base material by detaching the holding sheet from the plurality of metal electrodes.
    Type: Application
    Filed: May 2, 2019
    Publication date: September 19, 2019
    Inventors: Koichi KUMAI, Ryuji UEDA, Kentaro KUBOTA, Shigeki KUDO, Minoru KAWASAKI
  • Patent number: 10056517
    Abstract: A metal foil pattern layered body of the invention includes: a base member; a metal foil including a metal foil pattern formed by an opening and a metal portion; and a protuberance provided at the metal foil and at a boundary between the opening and the metal portion.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: August 21, 2018
    Assignee: DSM IP ASSETS B.V.
    Inventors: Koichi Kumai, Ryuji Ueda, Takao Tomono, Takehito Tsukamoto
  • Publication number: 20170358700
    Abstract: A metal foil pattern layered body of the invention includes a base member; a metal foil including a metal pattern formed by an opening and a metal portion; and a protuberance provided at the metal foil and at a boundary between the opening and the metal portion.
    Type: Application
    Filed: August 25, 2017
    Publication date: December 14, 2017
    Inventors: Koichi KUMAI, Ryuji UEDA, Takao TOMONO, Takehito TSUKAMOTO
  • Publication number: 20170018660
    Abstract: A method of manufacturing a circuit board includes: forming a plurality of metal electrodes so as to be separated from each other on a holding sheet by cutting a metal foil held on the holding sheet to remove a portion of the metal foil; forming adhesive layers on surfaces of the plurality of metal electrodes; adhering the adhesive layers to a base material by closely contacting the adhesive layers with the base material; and transcribing the adhesive layers and the plurality of metal electrodes onto the base material by detaching the holding sheet from the plurality of metal electrodes.
    Type: Application
    Filed: September 27, 2016
    Publication date: January 19, 2017
    Inventors: Koichi KUMAI, Ryuji UEDA, Kentaro KUBOTA, Shigeki KUDO, Minoru KAWASAKI
  • Patent number: 9478674
    Abstract: A method of manufacturing a circuit board includes: forming a plurality of metal electrodes so as to be separated from each other on a holding sheet by cutting a metal foil held on the holding sheet to remove a portion of the metal foil; forming adhesive layers on surfaces of the plurality of metal electrodes; adhering the adhesive layers to a base material by closely contacting the adhesive layers with the base material; and transcribing the adhesive layers and the plurality of metal electrodes onto the base material by detaching the holding sheet from the plurality of metal electrodes.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: October 25, 2016
    Assignee: DSM IP ASSETS B.V.
    Inventors: Koichi Kumai, Ryuji Ueda, Kentaro Kubota, Shigeki Kudo, Minoru Kawasaki
  • Patent number: 9237627
    Abstract: Short circuit failures and open circuit failures of light-emitting elements used for the backlight in an LCD panel can be reliably and easily detected. The voltage at the node between each series-connected light-emitting element array and a drive circuit is detected as a monitored voltage. A maximum detector detects the highest and a minimum detector detects the lowest of these monitored voltages. Short circuit or open circuit failure of a light-emitting element is detected by comparing the voltage difference between the maximum detector output and the minimum detector output with a specific reference voltage.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: January 12, 2016
    Assignee: PANASONIC CORPORATION
    Inventors: Go Takata, Shinichiro Kataoka, Yasunori Yamamoto, Tsukasa Kawahara, Ryuji Ueda, Daisuke Itou
  • Publication number: 20150022089
    Abstract: Short circuit failures and open circuit failures of light-emitting elements used for the backlight in an LCD panel can be reliably and easily detected. The voltage at the node between each series-connected light-emitting element array and a drive circuit is detected as a monitored voltage. A maximum detector detects the highest and a minimum detector detects the lowest of these monitored voltages. Short circuit or open circuit failure of a light-emitting element is detected by comparing the voltage difference between the maximum detector output and the minimum detector output with a specific reference voltage.
    Type: Application
    Filed: September 25, 2014
    Publication date: January 22, 2015
    Inventors: Go TAKATA, Shinichiro KATAOKA, Yasunori YAMAMOTO, Tsukasa KAWAHARA, Ryuji UEDA, Daisuke ITOU
  • Patent number: 8878445
    Abstract: Short circuit failures and open circuit failures of light-emitting elements used for the backlight in an LCD panel can be reliably and easily detected. The voltage at the node between each series-connected light-emitting element array and a drive circuit is detected as a monitored voltage. A maximum detector detects the highest and a minimum detector detects the lowest of these monitored voltages. Short circuit or open circuit failure of a light-emitting element is detected by comparing the voltage difference between the maximum detector output and the minimum detector output with a specific reference voltage.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: November 4, 2014
    Assignee: Panasonic Corporation
    Inventors: Go Takata, Shinichiro Kataoka, Yasunori Yamamoto, Tsukasa Kawahara, Ryuji Ueda, Daisuke Itou
  • Publication number: 20140090698
    Abstract: A metal foil pattern layered body of the invention includes: a base member; a metal foil including a metal foil pattern formed by an opening and a metal portion; and a protuberance provided at the metal foil and at a boundary between the opening and the metal portion.
    Type: Application
    Filed: December 5, 2013
    Publication date: April 3, 2014
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Koichi KUMAI, Ryuji UEDA, Takao TOMONO, Takehito TSUKAMOTO
  • Publication number: 20130247977
    Abstract: A method of manufacturing a circuit board includes: forming a plurality of metal electrodes so as to be separated from each other on a holding sheet by cutting a metal foil held on the holding sheet to remove a portion of the metal foil; forming adhesive layers on surfaces of the plurality of metal electrodes; adhering the adhesive layers to a base material by closely contacting the adhesive layers with the base material; and transcribing the adhesive layers and the plurality of metal electrodes onto the base material by detaching the holding sheet from the plurality of metal electrodes.
    Type: Application
    Filed: May 17, 2013
    Publication date: September 26, 2013
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Koichi Kumai, Ryuji Ueda, Kentaro Kubota, Shigeki Kudo, Minoru Kawasaki
  • Patent number: 8159140
    Abstract: The load driving apparatus according to the present invention includes a load current setting signal generating section, a load current generating section, a reference voltage generating section and a drive voltage generating section. The load current setting signal generating section generates a desired load current setting signal. The load current generating section generates a load current based on the load current setting signal to drive the load. The reference voltage generating section generates a reference voltage based on the load current setting signal. The drive voltage generating section generates a drive voltage, supplies the drive voltage to the load, generates a between-both-terminals voltage between both terminals of the load current generating section based on the drive voltage and controls the drive voltage so that the difference between the between-both-terminals voltage and the reference voltage becomes small.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: April 17, 2012
    Assignee: Panasonic Corporation
    Inventors: Go Takata, Shinichiro Kataoka, Yasunori Yamamoto, Tsukasa Kawahara, Ryuji Ueda, Daisuke Itou
  • Publication number: 20120074856
    Abstract: Short circuit failures and open circuit failures of light-emitting elements used for the backlight in an LCD panel can be reliably and easily detected. The voltage at the node between each series-connected light-emitting element array and a drive circuit is detected as a monitored voltage. A maximum detector detects the highest and a minimum detector detects the lowest of these monitored voltages. Short circuit or open circuit failure of a light-emitting element is detected by comparing the voltage difference between the maximum detector output and the minimum detector output with a specific reference voltage.
    Type: Application
    Filed: December 8, 2011
    Publication date: March 29, 2012
    Inventors: Go TAKATA, Shinichiro Kataoka, Yasunori Yamamoto, Tsukasa Kawahara, Ryuji Ueda, Daisuke Itou
  • Patent number: 8110344
    Abstract: A metal photoetching product comprising at least one large cavity of minor axis W1S, major axis W1L and depth D1 in a surface of the product, wherein one or more cavities are included inside at least one of the at least one large cavity, and a smallest hole among the cavities has minor axis of W2S, major axis W2L, and depth D2; and the product satisfies the following dimensions, D1+D2=plate thickness D, 0.02 mm?D?2 mm, 0.4×D<W1S<D, and 0.2×D<W2S<0.8×D.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: February 7, 2012
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Ryuji Ueda, Satoshi Tanaka, Osamu Koga, Fusao Takagi, Hiroshi Matsuzawa, Yusuke Onoda, Shingo Akao
  • Publication number: 20110080397
    Abstract: A backlight drive apparatus for current driving a plurality of strings has a period in which at least one of the strings is a current driven idly during a liquid crystal OFF period, in addition to a current driving period in which video information is displayed via liquid crystals. A failure detection section can monitor stabilized detection voltages in the period when current driven idly and detects failure state of the backlight panel.
    Type: Application
    Filed: June 23, 2010
    Publication date: April 7, 2011
    Applicant: Panasonic Corporation
    Inventors: Yasunori Yamamoto, Shinichiro Kataoka, Tsukasa Kawahara, Go Takata, Ryuji Ueda, Daisuke Itou
  • Publication number: 20100060177
    Abstract: The load driving apparatus according to the present invention includes a load current setting signal generating section, a load current generating section, a reference voltage generating section and a drive voltage generating section. The load current setting signal generating section generates a desired load current setting signal. The load current generating section generates a load current based on the load current setting signal to drive the load. The reference voltage generating section generates a reference voltage based on the load current setting signal. The drive voltage generating section generates a drive voltage, supplies the drive voltage to the load, generates a between-both-terminals voltage between both terminals of the load current generating section based on the drive voltage and controls the drive voltage so that the difference between the between-both-terminals voltage and the reference voltage becomes small.
    Type: Application
    Filed: September 3, 2009
    Publication date: March 11, 2010
    Applicant: Panasonic Corporation
    Inventors: Go TAKATA, Shinichiro Kataoka, Yasunori Yamamoto, Tsukasa Kawahara, Ryuji Ueda, Daisuke Itou
  • Publication number: 20100052572
    Abstract: The N light emitting element groups each include one or more light emitting elements. The power source circuit includes a control input terminal and supplies the power source voltage to the N light emitting element groups. The N current driving circuits, each including a feedback output terminal, generate N drive currents for driving the respective N light emitting element groups and generate main feedback voltages at the feedback output terminals based on the power source voltage. The main feedback circuit applies a main feedback signal to the control input terminal based on the N main feedback voltages. The auxiliary feedback circuit applies an auxiliary feedback signal to the control input terminal based on the power source voltage. The power source circuit adjusts the power source voltage based on at least one of the main feedback signal and the auxiliary feedback signal.
    Type: Application
    Filed: August 27, 2009
    Publication date: March 4, 2010
    Applicant: Panasonic Corporation
    Inventors: Shinichiro KATAOKA, Ryuji UEDA, Go TAKATA, Daisuke ITOU, Yasunori YAMAMOTO, Tsukasa KAWAHARA
  • Publication number: 20090081596
    Abstract: A metal photoetching product comprising at least one large cavity of minor axis W1S, major axis W1L and depth D1 in a surface of the product, wherein one or more cavities are included inside at least one of the at least one large cavity, and a smallest hole among the cavities has minor axis of W2S, major axis W2L, and depth D2; and the product satisfies the following dimensions, D1+D2=plate thickness D, 0.02 mm?D?2 mm, 0.4×D<W1S<D, and 0.2×D<W2S<0.8×D.
    Type: Application
    Filed: November 25, 2008
    Publication date: March 26, 2009
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Ryuji Ueda, Satoshi Tanaka, Osamu Koga, Fusao Takagi, Hiroshi Matsuzawa, Yusuke Onoda, Shingo Akao
  • Patent number: 7498074
    Abstract: A metal photoetching product comprising at least one large cavity of minor axis W1S, major axis W1L and depth D1 in a surface of the product, wherein one or more cavities are included inside at least one of the at least one large cavity, and a smallest hole among the cavities has minor axis of W2S, major axis W2L, and depth D2; and the product satisfies the following dimensions, D1+D2=plate thickness D, 0.02 mm?D?2 mm, 0.4×D<W1S<D, and 0.2×D<W2S<0.8×D.
    Type: Grant
    Filed: January 16, 2004
    Date of Patent: March 3, 2009
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Ryuji Ueda, Satoshi Tanaka, Osamu Koga, Fusao Takagi, Hiroshi Matsuzawa, Yusuke Onoda, Shingo Akao