Patents by Inventor Sébastien Cremer
Sébastien Cremer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11947202Abstract: The present disclosure relates to a method including the following steps: a) forming a waveguide from a first material, the waveguide being configured to guide an optical signal; b) forming a layer made of a second material that is electrically conductive and transparent to a wavelength of the optical signal, steps a) and b) being implemented such that the layer made of the second material is in contact with at least one of the faces of the waveguide, or is separated from the at least one of the faces by a distance of less than half, preferably less than a quarter, of the wavelength of the optical signal. The application further relates to a phase modulator, in particular obtained by such a method.Type: GrantFiled: April 3, 2023Date of Patent: April 2, 2024Assignee: STMicroelectronics (Crolles 2) SASInventors: Sébastien Cremer, Frédéric Boeuf, Stephane Monfray
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Publication number: 20240096898Abstract: The present description concerns an electronic device comprising: a silicon layer, an insulating layer in contact with a first surface of the silicon layer, a transistor comprising source, drain, and body regions arranged in the silicon layer, and a gate region topping the body region and comprising a gate portion laterally extending beyond the source and drain regions, the body region being continued by a body contact region not covered with the gate region, and a region of extension of the body region being located under the gate portion; the device further comprising, under the gate portion, a partial insulating trench in the silicon layer extending from a second surface of the silicon layer down to a depth smaller than the thickness of the silicon layer.Type: ApplicationFiled: March 27, 2023Publication date: March 21, 2024Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, STMicroelectronics (Crolles 2) SASInventors: Tadeu MOTA FRUTUOSO, Xavier GARROS, Blandine DURIEZ, Sebastien CREMER
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Publication number: 20240097030Abstract: The present description concerns an electronic device comprising: —a silicon layer having a first surface and a second surface, —an insulating layer in contact with the first surface of the silicon layer, —at least one transistor comprising source, drain, and body regions arranged in the silicon layer, and a gate region topping the body region and comprising a gate portion laterally extending beyond the source and drain regions, the body region being continued by a body contact region not covered with the gate region, and a region of extension of the body region being located under the gate portion; the gate portion being less heavily doped than the rest of the gate region.Type: ApplicationFiled: March 27, 2023Publication date: March 21, 2024Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, STMicroelectronics (Crolles 2) SASInventors: Sebastien CREMER, Tadeu MOTA FRUTUOSO, Xavier GARROS, Blandine DURIEZ
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Patent number: 11837678Abstract: A photodiode includes an active area formed by intrinsic germanium. The active area is located within a cavity formed in a silicon layer. The cavity is defined by opposed side walls which are angled relative to a direction perpendicular to a bottom surface of the silicon layer. The angled side walls support epitaxial growth of the intrinsic germanium with minimal lattice defects.Type: GrantFiled: September 27, 2021Date of Patent: December 5, 2023Assignee: STMicroelectronics (Crolles 2) SASInventors: Charles Baudot, Sebastien Cremer, Nathalie Vulliet, Denis Pellissier-Tanon
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Patent number: 11784275Abstract: A vertical photodiode includes an active area. The contacting pads for the diode terminals are laterally shifted away from the active area so as to not be located above or below the active area. The active area is formed in a layer of semiconductor material by a lower portion of a germanium area that is intrinsic and an upper portion of the germanium area that is doped with a first conductivity type. The vertical photodiode is optically coupled to a waveguide formed in the layer of semiconductor material.Type: GrantFiled: May 5, 2021Date of Patent: October 10, 2023Assignee: STMicroelectronics (Crolles 2) SASInventors: Charles Baudot, Sebastien Cremer, Nathalie Vulliet, Denis Pellissier-Tanon
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Publication number: 20230290786Abstract: A device includes an active semiconductor layer on top of and in contact with an insulating layer which overlies a semiconductor substrate. A transistor for the device includes a source region, a drain region, and a body region arranged in the active semiconductor layer. The body region of the transistor is electrically coupled to the semiconductor substrate using a conductive via that crosses through the insulating layer.Type: ApplicationFiled: March 7, 2023Publication date: September 14, 2023Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SAInventors: Sebastien CREMER, Frederic MONSIEUR, Alain FLEURY, Sebastien HAENDLER
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Publication number: 20230236446Abstract: The present disclosure relates to a method including the following steps: a) forming a waveguide from a first material, the waveguide being configured to guide an optical signal; b) forming a layer made of a second material that is electrically conductive and transparent to a wavelength of the optical signal, steps a) and b) being implemented such that the layer made of the second material is in contact with at least one of the faces of the waveguide, or is separated from the at least one of the faces by a distance of less than half, preferably less than a quarter, of the wavelength of the optical signal. The application further relates to a phase modulator, in particular obtained by such a method.Type: ApplicationFiled: April 3, 2023Publication date: July 27, 2023Inventors: Sébastien Cremer, Frédéric Boeuf, Stephane Monfray
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Patent number: 11644697Abstract: The present disclosure relates to a method comprising the following steps: a) forming a waveguide from a first material, the waveguide being configured to guide an optical signal; b) forming a layer made of a second material that is electrically conductive and transparent to a wavelength of the optical signal, steps a) and b) being implemented such that the layer made of the second material is in contact with at least one of the faces of the waveguide, or is separated from the at least one of the faces by a distance of less than half, preferably less than a quarter, of the wavelength of the optical signal. The application further relates to a phase modulator, in particular obtained by such a method.Type: GrantFiled: August 7, 2020Date of Patent: May 9, 2023Assignee: STMICROELECTRONICS (CROLLES 2) SASInventors: Sébastien Cremer, Frédéric Boeuf, Stephane Monfray
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Publication number: 20230074527Abstract: A method includes forming a layer made of a first insulating material on a first layer made of a second insulating material that covers a support, defining a waveguide made of the first material in the layer of the first material, covering the waveguide made of the first material with a second layer of the second material, planarizing an upper surface of the second layer of the second material, and forming a single-crystal silicon layer over the second layer.Type: ApplicationFiled: November 16, 2022Publication date: March 9, 2023Inventor: Sebastien Cremer
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Patent number: 11531224Abstract: A method includes forming a layer made of a first insulating material on a first layer made of a second insulating material that covers a support, defining a waveguide made of the first material in the layer of the first material, covering the waveguide made of the first material with a second layer of the second material, planarizing an upper surface of the second layer of the second material, and forming a single-crystal silicon layer over the second layer.Type: GrantFiled: July 16, 2020Date of Patent: December 20, 2022Assignee: STMicroelectronics (Crolles 2) SASInventor: Sebastien Cremer
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Publication number: 20220320722Abstract: The present disclosure relates to a method of making an electronic device comprising a first wafer including at least one trench and a second wafer, the second wafer being bonded, by hybrid bonding, to the first wafer, so as to form, at the level of the trench, at least one enclosed space, empty or gas-filled.Type: ApplicationFiled: March 22, 2022Publication date: October 6, 2022Applicant: STMicroelectronics (Crolles 2) SASInventor: Sebastien CREMER
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Publication number: 20220013681Abstract: A photodiode includes an active area formed by intrinsic germanium. The active area is located within a cavity formed in a silicon layer. The cavity is defined by opposed side walls which are angled relative to a direction perpendicular to a bottom surface of the silicon layer. The angled side walls support epitaxial growth of the intrinsic germanium with minimal lattice defects.Type: ApplicationFiled: September 27, 2021Publication date: January 13, 2022Applicant: STMicroelectronics (Crolles 2) SASInventors: Charles BAUDOT, Sebastien CREMER, Nathalie VULLIET, Denis PELLISSIER-TANON
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Patent number: 11145779Abstract: A photodiode includes an active area formed by intrinsic germanium. The active area is located within a cavity formed in a silicon layer. The cavity is defined by opposed side walls which are angled relative to a direction perpendicular to a bottom surface of the silicon layer. The angled side walls support epitaxial growth of the intrinsic germanium with minimal lattice defects.Type: GrantFiled: March 6, 2019Date of Patent: October 12, 2021Assignee: STMicroelectronics (Crolles 2) SASInventors: Charles Baudot, Sebastien Cremer, Nathalie Vulliet, Denis Pellissier-Tanon
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Patent number: 11107941Abstract: A vertical photodiode includes an active area. The contacting pads for the diode terminals are laterally shifted away from the active area so as to not be located above or below the active area. The active area is formed in a layer of semiconductor material by a lower portion of a germanium area that is intrinsic and an upper portion of the germanium area that is doped with a first conductivity type. The vertical photodiode is optically coupled to a waveguide formed in the layer of semiconductor material.Type: GrantFiled: March 5, 2019Date of Patent: August 31, 2021Assignee: STMicroelectronics (Crolles 2) SASInventors: Charles Baudot, Sebastien Cremer, Nathalie Vulliet, Denis Pellissier-Tanon
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Publication number: 20210257507Abstract: A vertical photodiode includes an active area. The contacting pads for the diode terminals are laterally shifted away from the active area so as to not be located above or below the active area. The active area is formed in a layer of semiconductor material by a lower portion of a germanium area that is intrinsic and an upper portion of the germanium area that is doped with a first conductivity type. The vertical photodiode is optically coupled to a waveguide formed in the layer of semiconductor material.Type: ApplicationFiled: May 5, 2021Publication date: August 19, 2021Applicant: STMicroelectronics (Crolles 2) SASInventors: Charles BAUDOT, Sebastien CREMER, Nathalie VULLIET, Denis PELLISSIER-TANON
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Publication number: 20210055579Abstract: The present disclosure relates to a method comprising the following steps: a) forming a waveguide from a first material, the waveguide being configured to guide an optical signal; b) forming a layer made of a second material that is electrically conductive and transparent to a wavelength of the optical signal, steps a) and b) being implemented such that the layer made of the second material is in contact with at least one of the faces of the waveguide, or is separated from the at least one of the faces by a distance of less than half, preferably less than a quarter, of the wavelength of the optical signal. The application further relates to a phase modulator, in particular obtained by such a method.Type: ApplicationFiled: August 7, 2020Publication date: February 25, 2021Inventors: Sébastien Cremer, Frédéric Boeuf, Stephane Monfray
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Publication number: 20210018790Abstract: A method includes forming a layer made of a first insulating material on a first layer made of a second insulating material that covers a support, defining a waveguide made of the first material in the layer of the first material, covering the waveguide made of the first material with a second layer of the second material, planarizing an upper surface of the second layer of the second material, and forming a single-crystal silicon layer over the second layer.Type: ApplicationFiled: July 16, 2020Publication date: January 21, 2021Inventor: Sebastien Cremer
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Patent number: 10877211Abstract: A photonic integrated circuit may include a silicon layer including a waveguide and at least one other photonic component. The photonic integrated circuit may also include a first insulating region arranged above a first side of the silicon layer and encapsulating at least one metallization level, a second insulating region arranged above a second side of the silicon layer and encapsulating at least one gain medium of a laser source optically coupled to the waveguide.Type: GrantFiled: November 26, 2019Date of Patent: December 29, 2020Assignees: STMICROELECTRONICS SA, STMICROELECTRONICS (CROLLES 2) SASInventors: Alain Chantre, Sébastien Cremer
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Publication number: 20200116927Abstract: A photonic integrated circuit may include a silicon layer including a waveguide and at least one other photonic component. The photonic integrated circuit may also include a first insulating region arranged above a first side of the silicon layer and encapsulating at least one metallization level, a second insulating region arranged above a second side of the silicon layer and encapsulating at least one gain medium of a laser source optically coupled to the waveguide.Type: ApplicationFiled: November 26, 2019Publication date: April 16, 2020Inventors: Alain Chantre, Sébastien Cremer
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Patent number: 10511147Abstract: The invention relates to a III-V heterostructure laser device (1) arranged in and/or on silicon, comprising: a III-V heterostructure gain medium (3); and an optical rib waveguide (11), arranged facing the gain medium (3) and comprising a slab waveguide (15) equipped with a longitudinal rib (17), the optical rib waveguide (11) being arranged in the silicon. The optical rib waveguide (11) is oriented so that at least one Bragg grating (19, 19a, 19b) is arranged on that side (21) of the slab waveguide (15) which is proximal relative to the gain medium (3) and in that the rib (17) is placed on that side (23) of the slab waveguide (15) that is distal relative to the gain medium (3).Type: GrantFiled: May 30, 2018Date of Patent: December 17, 2019Assignees: Commissariat A L'Energie Atomique et aux Energies Alternatives, STMICROELECTRONICS SA, STMICROELECTRONICS (CROLLES 2) SASInventors: Thomas Ferrotti, Badhise Ben Bakir, Alain Chantre, Sebastien Cremer, Helene Duprez