Patents by Inventor Sa Ro Han Park

Sa Ro Han Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8389400
    Abstract: A method of forming fine patterns of a semiconductor device comprises forming sacrificial film patterns of a line type in a cell region of a semiconductor substrate and, at the same time, forming pad patterns in a peripheral region of the semiconductor substrate, forming a spacer on sidewalls of each of the sacrificial film patterns and the pad patterns, forming a gap-fill layer on sidewalls of the spacers to thereby form line and space patterns, including the sacrificial film patterns and the gap-fill layers, in the cell region, and separating the line and space patterns of the cell region at regular intervals and, at the same time, etching the pad patterns of the peripheral region to thereby form specific patterns in the peripheral region.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: March 5, 2013
    Assignee: Hynix Semiconductor Inc
    Inventors: Ki Lyoung Lee, Sa Ro Han Park
  • Publication number: 20110124198
    Abstract: A method of forming fine patterns of a semiconductor device comprises forming sacrificial film patterns of a line type in a cell region of a semiconductor substrate and, at the same time, forming pad patterns in a peripheral region of the semiconductor substrate, forming a spacer on sidewalls of each of the sacrificial film patterns and the pad patterns, forming a gap-fill layer on sidewalls of the spacers to thereby form line and space patterns, including the sacrificial film patterns and the gap-fill layers, in the cell region, and separating the line and space patterns of the cell region at regular intervals and, at the same time, etching the pad patterns of the peripheral region to thereby form specific patterns in the peripheral region.
    Type: Application
    Filed: December 30, 2009
    Publication date: May 26, 2011
    Applicant: Hynix Semiconductor Inc.
    Inventors: Ki Lyoung LEE, Sa Ro Han Park
  • Patent number: 7781344
    Abstract: A method of manufacturing a semiconductor device according to the invention is an effective technique for ensuring a sufficient process margin and enabling the formation of a fine pattern in a peripheral circuit region. The method includes forming an anti-reflective layer with a varying thickness in a peripheral circuit region and a cell region, and then over-etching the anti-reflective layer in the peripheral circuit region. The method is capable of improving the data processing speed of a semiconductor device and therefore increases the device efficiency.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: August 24, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sa Ro Han Park
  • Publication number: 20100099046
    Abstract: A method for manufacturing a semiconductor device comprises forming a protective film over a photoresist pattern to improve the residual ratio of the photoresist pattern. The method comprises forming a photoresist pattern over an underlying layer and forming a protective pattern on an upper portion and sidewalls of the photoresist pattern.
    Type: Application
    Filed: June 22, 2009
    Publication date: April 22, 2010
    Applicant: Hynix Semiconductor Inc.
    Inventors: Hyeong Soo Kim, Byoung Hoon Lee, Sa Ro Han Park
  • Publication number: 20090305505
    Abstract: A method for manufacturing a semiconductor device includes forming a plurality bar patterns over an underlying layer. A spacer is formed at both sides of the bar patterns and the bar patterns are removed. The spacers are isolated by an exposing process to form a vernier pattern. The underlying layer is etched using the vernier pattern as an etching mask.
    Type: Application
    Filed: December 30, 2008
    Publication date: December 10, 2009
    Applicant: Hynix Semiconductor Inc.
    Inventors: Sa Ro Han PARK, Tae Seung Eom
  • Publication number: 20080286449
    Abstract: A method of manufacturing a template for nano imprint lithography process may include: forming a chrome layer, an intermediate film, and a photoresist film sequentially over a substrate. The method may further include forming a photoresist film pattern; forming an intermediate film pattern with the photoresist film pattern as an etching mask; and forming a spacer at a sidewall of the intermediate film pattern. The intermediate film pattern may be removed using an etching selectivity between the intermediate film pattern and the spacer. Finally, the chrome layer and the substrate may be etched using the spacer as an etching mask to form the template.
    Type: Application
    Filed: October 2, 2007
    Publication date: November 20, 2008
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Sa Ro Han Park
  • Patent number: 7396751
    Abstract: A method for manufacturing a semiconductor device includes forming a second storage node contact hole with a mask for storage node and securing an overlay margin between a storage node contact hole and a storage node with a hard mask layer that serves as a hard mask as well as an anti-reflection film to reduce contact resistance, prevent reduction of a line-width of a lower interlayer insulating film and eliminate processes for depositing the interlayer insulating film and a polysilicon layer and etching the polysilicon layer to reduce a production period and cost of products.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: July 8, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Ki Lyoung Lee, Keun Do Ban, Sa Ro Han Park
  • Publication number: 20080090420
    Abstract: A method of manufacturing a semiconductor device according to the invention is an effective technique for ensuring a sufficient process margin and enabling the formation of a fine pattern in a peripheral circuit region. The method includes forming an anti-reflective layer with a varying thickness in a peripheral circuit region and a cell region, and then over-etching the anti-reflective layer in the peripheral circuit region. The method is capable of improving the data processing speed of a semiconductor device and therefore increases the device efficiency.
    Type: Application
    Filed: June 29, 2007
    Publication date: April 17, 2008
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Sa Ro Han Park
  • Publication number: 20070161221
    Abstract: A method for manufacturing a semiconductor device includes forming a second storage node contact hole with a mask for storage node and securing an overlay margin between a storage node contact hole and a storage node with a hard mask layer that serves as a hard mask as well as an anti-reflection film to reduce contact resistance, prevent reduction of a line-width of a lower interlayer insulating film and eliminate processes for depositing the interlayer insulating film and a polysilicon layer and etching the polysilicon layer to reduce a production period and cost of products.
    Type: Application
    Filed: December 28, 2006
    Publication date: July 12, 2007
    Applicant: Hynix Semiconductor Inc.
    Inventors: Ki Lyoung Lee, Keun Do Ban, Sa Ro Han Park