Patents by Inventor Sachie Takahashi

Sachie Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120330739
    Abstract: A server includes a database that stores, in association with user identification information for identifying the user who purchases or uses goods or services, the number of points that are assigned to the user according to the purchased or used goods or services and that can be used to purchase goods or services. The server divides the points stored in association with the user identification information into user's own points that only the user can use; and other's points that other users other than the user can use, before storing the points in the database.
    Type: Application
    Filed: June 4, 2012
    Publication date: December 27, 2012
    Applicant: NEC BIGLOBE, LTD.
    Inventors: Sachie Takahashi, Tomoya Matsumoto, Hiroki Takahashi, Naoya Shimizu
  • Patent number: 7071768
    Abstract: In an integrated circuit having an internal supply voltage generation circuit which generates an internal supply voltage by descending an external supply voltage, there is provided an internal circuit which operates with a supplied internal supply voltage. The internal supply voltage generation circuit changes an internal supply voltage level to be generated in accordance with an operation speed of the internal circuit. Preferably the semiconductor integrated circuit includes a clock control circuit which generates an internal clock signal the frequency of which is controlled in accordance with the operation speed of the internal circuit. When the internal clock signal is controlled to have a higher frequency, the internal supply voltage is controlled to be higher. Also, when the internal clock signal is controlled to have a lower frequency, the internal supply voltage is controlled to be lower.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: July 4, 2006
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Abe, Yutaka Takasuka, Hisao Ise, Hiroko Takano, Sachie Takahashi
  • Publication number: 20040057324
    Abstract: In an integrated circuit having an internal supply voltage generation circuit which generates an internal supply voltage by descending an external supply voltage, there is provided an internal circuit which operates with a supplied internal supply voltage. The internal supply voltage generation circuit changes an internal supply voltage level to be generated in accordance with an operation speed of the internal circuit. Preferably the semiconductor integrated circuit includes a clock control circuit which generates an internal clock signal the frequency of which is controlled in. accordance with the operation speed of the internal circuit. When the internal clock signal is controlled to have a higher frequency, the internal supply voltage is controlled to be higher. Also, when the internal clock signal is controlled to have a lower frequency, the internal supply voltage is controlled to be lower.
    Type: Application
    Filed: July 29, 2003
    Publication date: March 25, 2004
    Inventors: Hiroyuki Abe, Yutaka Takasuka, Hisao Ise, Hiroko Takano, Sachie Takahashi
  • Patent number: 6563359
    Abstract: A clock modulation circuit modulates the frequency of a clock signal to generate a modulated clock signal. A wait requesting signal receives frequency information indicating the frequency of the modulated clock signal and, when the frequency information indicates a frequency higher than a reference frequency, generates a wait requesting signal to an external bus interface. Since an optimum wait cycle is inserted to the external bus interface according to a change of the frequency of the modulated clock signal, needless wait cycle can be prevented from being inserted to the external bus interface. As a result of this, it is possible to disperse the peak of radiated noise which is caused by the clock signal and to reduce electromagnetic interference, without decreasing performance of a system. Namely, it can serve both market needs for reducing noise and speeding up.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: May 13, 2003
    Assignee: Fujitsu Limited
    Inventors: Yasuhiro Kitagawa, Sachie Takahashi, Yukihiro Yaguchi
  • Publication number: 20020180496
    Abstract: A clock modulation circuit modulates the frequency of a clock signal to generate a modulated clock signal. A wait requesting signal receives frequency information indicating the frequency of the modulated clock signal and, when the frequency information indicates a frequency higher than a reference frequency, generates a wait requesting signal to an external bus interface. Since an optimum wait cycle is inserted to the external bus interface according to a change of the frequency of the modulated clock signal, needless wait cycle can be prevented from being inserted to the external bus interface. As a result of this, it is possible to disperse the peak of radiated noise which is caused by the clock signal and to reduce electromagnetic interference, without decreasing performance of a system. Namely, it can serve both market needs for reducing noise and speeding up.
    Type: Application
    Filed: January 3, 2002
    Publication date: December 5, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Yasuhiro Kitagawa, Sachie Takahashi, Yukihiro Yaguchi