Patents by Inventor Sachiko Aoi
Sachiko Aoi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11769801Abstract: In a guard ring section of a silicon carbide semiconductor device, an electric field relaxation layer for relaxing an electric field is formed in a surface layer portion of a drift layer, so that electric field is restricted from penetrating between guard rings. Thus, an electric field concentration is relaxed. Accordingly, a SiC semiconductor device having a required withstand voltage is obtained.Type: GrantFiled: September 16, 2021Date of Patent: September 26, 2023Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yuichi Takeuchi, Ryota Suzuki, Tatsuji Nagaoka, Sachiko Aoi
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Publication number: 20220005928Abstract: In a guard ring section of a silicon carbide semiconductor device, an electric field relaxation layer for relaxing an electric field is formed in a surface layer portion of a drift layer, so that electric field is restricted from penetrating between guard rings. Thus, an electric field concentration is relaxed. Accordingly, a SiC semiconductor device having a required withstand voltage is obtained.Type: ApplicationFiled: September 16, 2021Publication date: January 6, 2022Inventors: Yuichi TAKEUCHI, Ryota SUZUKI, Tatsuji NAGAOKA, Sachiko AOI
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Patent number: 11177353Abstract: In a guard ring section of a silicon carbide semiconductor device, an electric field relaxation layer for relaxing an electric field is formed in a surface layer portion of a drift layer, so that electric field is restricted from penetrating between guard rings. Thus, an electric field concentration is relaxed. Accordingly, a SiC semiconductor device having a required withstand voltage is obtained.Type: GrantFiled: May 31, 2019Date of Patent: November 16, 2021Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yuichi Takeuchi, Ryota Suzuki, Tatsuji Nagaoka, Sachiko Aoi
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Patent number: 11063145Abstract: A silicon carbide semiconductor device includes: a substrate; a first impurity region on the substrate; a base region on the first impurity region; a second impurity region in the base region; a trench gate structure including a gate insulation film and a gate electrode in a trench; a first electrode connected to the second impurity region and the base region; a second electrode on a rear surface of the substrate; a first current dispersion layer between the first impurity region and the base region; a plurality of first deep layers in the second current dispersion layer; a second current dispersion layer between the first current dispersion layer and the base region; and a second deep layer between the first current dispersion layer and the base region apart from the trench.Type: GrantFiled: January 30, 2020Date of Patent: July 13, 2021Assignee: DENSO CORPORATIONInventors: Shuhei Mitani, Aiko Kaji, Yasuhiro Ebihara, Tatsuji Nagaoka, Sachiko Aoi
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Patent number: 11049966Abstract: When a film thickness of a second epitaxial film is measured, an infrared light is irradiated from a surface side of the second epitaxial film onto a base layer on which a first epitaxial film and the second epitaxial film are formed. A reflected light from an interface between the first epitaxial film and the base layer and a reflected light from a surface of the second epitaxial film are measured to obtain a two-layer film thickness, which is a total film thickness of the first epitaxial film and the second epitaxial film. The film thickness of the second epitaxial film is calculated by subtracting a one-layer film thickness, which is a film thickness of the first epitaxial film, from the two-layer film thickness.Type: GrantFiled: August 19, 2020Date of Patent: June 29, 2021Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Akira Amano, Takayuki Satomura, Yuichi Takeuchi, Katsumi Suzuki, Sachiko Aoi
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Patent number: 10923395Abstract: In a semiconductor device, a semiconductor element is formed in a semiconductor, an interlayer insulating film having a contact hole and containing at least one of phosphorus and boron is disposed above the semiconductor, a metal electrode is disposed above the interlayer insulating film and is connected to the semiconductor element through the contact hole, and the interlayer insulating film is filled with hydrogen.Type: GrantFiled: July 15, 2019Date of Patent: February 16, 2021Assignee: DENSO CORPORATIONInventors: Yasushi Urakami, Takehiro Kato, Sachiko Aoi
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Publication number: 20200381313Abstract: When a film thickness of a second epitaxial film is measured, an infrared light is irradiated from a surface side of the second epitaxial film onto a base layer on which a first epitaxial film and the second epitaxial film are formed. A reflected light from an interface between the first epitaxial film and the base layer and a reflected light from a surface of the second epitaxial film are measured to obtain a two-layer film thickness, which is a total film thickness of the first epitaxial film and the second epitaxial film. The film thickness of the second epitaxial film is calculated by subtracting a one-layer film thickness, which is a film thickness of the first epitaxial film, from the two-layer film thickness.Type: ApplicationFiled: August 19, 2020Publication date: December 3, 2020Inventors: Akira AMANO, Takayuki SATOMURA, Yuichi TAKEUCHI, Katsumi SUZUKI, Sachiko AOI
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Patent number: 10790201Abstract: When a film thickness of a second epitaxial film is measured, an infrared light is irradiated from a surface side of the second epitaxial film onto a base layer on which a first epitaxial film and the second epitaxial film are formed. A reflected light from an interface between the first epitaxial film and the base layer and a reflected light from a surface of the second epitaxial film are measured to obtain a two-layer film thickness, which is a total film thickness of the first epitaxial film and the second epitaxial film. The film thickness of the second epitaxial film is calculated by subtracting a one-layer film thickness, which is a film thickness of the first epitaxial film, from the two-layer film thickness.Type: GrantFiled: February 18, 2019Date of Patent: September 29, 2020Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Akira Amano, Takayuki Satomura, Yuichi Takeuchi, Katsumi Suzuki, Sachiko Aoi
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Patent number: 10770580Abstract: In an end portion of a trench, an opening where the end portion of the trench is exposed is formed in a lead-out electrode, a side surface of the trench gate electrode on a top surface side of a semiconductor substrate is spaced from a trench side surface, and a range adjacent to a boundary line positioned between a top surface of the semiconductor substrate and the trench side surface is covered with a laminated insulating film configured such that an interlayer insulating film is laminated on a gate insulating film. This makes it possible to prevent dielectric breakdown of an insulating film.Type: GrantFiled: October 30, 2017Date of Patent: September 8, 2020Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATIONInventors: Toru Onishi, Sachiko Aoi, Yasushi Urakami
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Patent number: 10748780Abstract: In a manufacturing method of a silicon carbide semiconductor device, a semiconductor substrate made of silicon carbide and on which a base layer is formed is prepared, a trench is provided in the base layer, a silicon carbide layer is epitaxially formed on a surface of the base layer while filling the trench with the silicon carbide layer, the sacrificial layer is planarized by reflow after forming the sacrificial layer, and the silicon carbide layer is etched back together with the planarized sacrificial layer by dry etching under an etching condition in which an etching selectivity of the silicon carbide layer to the sacrificial layer is 1.Type: GrantFiled: March 14, 2019Date of Patent: August 18, 2020Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Shigeyuki Takagi, Masaki Shimomura, Yuichi Takeuchi, Katsumi Suzuki, Sachiko Aoi
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Patent number: 10714611Abstract: A silicon carbide semiconductor device includes: a vertical semiconductor element, which includes: a semiconductor substrate made of silicon carbide and having a high impurity concentration layer on a back side and a drift layer on a front side; a base region made of silicon carbide on the drift layer; a source region arranged on the base region and made of silicon carbide; a deep layer disposed deeper than the base region; a trench gate structure including a gate insulation film arranged on an inner wall of a gate trench which is arranged deeper than the base region and shallower than the deep layer, and a gate electrode disposed on the gate insulation film; a source electrode electrically connected to the base region, the source region, and the deep layer; and a drain electrode electrically connected to the high impurity concentration layer.Type: GrantFiled: July 9, 2019Date of Patent: July 14, 2020Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yuichi Takeuchi, Atsuya Akiba, Sachiko Aoi, Katsumi Suzuki
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Publication number: 20200168732Abstract: A silicon carbide semiconductor device includes: a substrate; a first impurity region on the substrate; a base region on the first impurity region; a second impurity region in the base region; a trench gate structure including a gate insulation film and a gate electrode in a trench; a first electrode connected to the second impurity region and the base region; a second electrode on a rear surface of the substrate; a first current dispersion layer between the first impurity region and the base region; a plurality of first deep layers in the second current dispersion layer; a second current dispersion layer between the first current dispersion layer and the base region; and a second deep layer between the first current dispersion layer and the base region apart from the trench.Type: ApplicationFiled: January 30, 2020Publication date: May 28, 2020Inventors: Shuhei MITANI, Aiko KAJI, Yasuhiro EBIHARA, Tatsuji NAGAOKA, Sachiko AOI
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Patent number: 10643851Abstract: A compound semiconductor device includes a semiconductor substrate having a ground layer of a first conductivity type made of a compound semiconductor, a first conductivity type region formed at a corner portion of a bottom of a deep trench formed to the ground layer, and a deep layer of a second conductivity type formed in the deep trench so as to cover the first conductivity type region. A cross section of the first conductivity type region is a triangular shape or a rounded triangular shape in which a portion of the first conductivity type region being in contact with the deep layer is recessed to have a curved surface.Type: GrantFiled: January 12, 2017Date of Patent: May 5, 2020Assignee: DENSO CORPORATIONInventors: Yuichi Takeuchi, Atsuya Akiba, Katsumi Suzuki, Sachiko Aoi
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Publication number: 20200052112Abstract: In an end portion of a trench, an opening where the end portion of the trench is exposed is formed in a lead-out electrode, a side surface of the trench gate electrode on a top surface side of a semiconductor substrate is spaced from a trench side surface, and a range adjacent to a boundary line positioned between a top surface of the semiconductor substrate and the trench side surface is covered with a laminated insulating film configured such that an interlayer insulating film is laminated on a gate insulating film. This makes it possible to prevent dielectric breakdown of an insulating film.Type: ApplicationFiled: October 30, 2017Publication date: February 13, 2020Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATIONInventors: Toru ONISHI, Sachiko AOI, Yasushi URAKAMI
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Publication number: 20190341308Abstract: In a semiconductor device, a semiconductor element is formed in a semiconductor, an interlayer insulating film having a contact hole and containing at least one of phosphorus and boron is disposed above the semiconductor, a metal electrode is disposed above the interlayer insulating film and is connected to the semiconductor element through the contact hole, and the interlayer insulating film is filled with hydrogen.Type: ApplicationFiled: July 15, 2019Publication date: November 7, 2019Inventors: Yasushi URAKAMI, Takehiro KATO, Sachiko AOI
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Publication number: 20190334030Abstract: A silicon carbide semiconductor device includes: a vertical semiconductor element, which includes: a semiconductor substrate made of silicon carbide and having a high impurity concentration layer on a back side and a drift layer on a front side; a base region made of silicon carbide on the drift layer; a source region arranged on the base region and made of silicon carbide; a deep layer disposed deeper than the base region; a trench gate structure including a gate insulation film arranged on an inner wall of a gate trench which is arranged deeper than the base region and shallower than the deep layer, and a gate electrode disposed on the gate insulation film; a source electrode electrically connected to the base region, the source region, and the deep layer; and a drain electrode electrically connected to the high impurity concentration layer.Type: ApplicationFiled: July 9, 2019Publication date: October 31, 2019Inventors: Yuichi TAKEUCHI, Atsuya AKIBA, Sachiko AOI, Katsumi SUZUKI
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Publication number: 20190288074Abstract: In a guard ring section of a silicon carbide semiconductor device, an electric field relaxation layer for relaxing an electric field is formed in a surface layer portion of a drift layer, so that electric field is restricted from penetrating between guard rings. Thus, an electric field concentration is relaxed. Accordingly, a SiC semiconductor device having a required withstand voltage is obtained.Type: ApplicationFiled: May 31, 2019Publication date: September 19, 2019Inventors: Yuichi TAKEUCHI, Ryota SUZUKI, Tatsuji NAGAOKA, Sachiko AOI
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Patent number: 10374081Abstract: A trench gate semiconductor switching element is provided. The semiconductor substrate of this element includes a second conductivity type bottom region in contact with the gate insulation layer at a bottom surface of the trench; and a first conductivity type second semiconductor region extending from a position in contact with a lower surface of the body region to a position in contact with a lower surface of the bottom region, and in contact with the gate insulation layer on a lower side of the body region. The bottom region includes a low concentration region in contact with the gate insulation layer in a first range of the bottom surface positioned at an end in a long direction of the trench; and a high concentration region in contact with the gate insulation layer in a second range of the bottom surface adjacent to the first range.Type: GrantFiled: December 26, 2016Date of Patent: August 6, 2019Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATIONInventors: Jun Saito, Sachiko Aoi, Yasushi Urakami
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Patent number: 10367091Abstract: A trench gate semiconductor switching element is provided. The semiconductor substrate of the element includes a second conductivity type bottom region in contact with the gate insulation layer at a bottom surface of the trench, and a first conductivity type second semiconductor region extending from a position in contact with a lower surface of the body region to a position in contact with a lower surface of the bottom region. The bottom region includes a first bottom region in contact with the gate insulation layer in a first range of the bottom surface positioned at an end in a long direction of the trench and extending from the bottom surface to a first position; and a second bottom region in contact with the gate insulation layer in a second range adjacent to the first range and extending from the bottom surface to a second position lower than the first position.Type: GrantFiled: December 26, 2016Date of Patent: July 30, 2019Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATIONInventors: Jun Saito, Sachiko Aoi, Yasushi Urakami
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Publication number: 20190214264Abstract: In a manufacturing method of a silicon carbide semiconductor device, a semiconductor substrate made of silicon carbide and on which a base layer is formed is prepared, a trench is provided in the base layer, a silicon carbide layer is epitaxially formed on a surface of the base layer while filling the trench with the silicon carbide layer, the sacrificial layer is planarized by reflow after forming the sacrificial layer, and the silicon carbide layer is etched back together with the planarized sacrificial layer by dry etching under an etching condition in which an etching selectivity of the silicon carbide layer to the sacrificial layer is 1.Type: ApplicationFiled: March 14, 2019Publication date: July 11, 2019Inventors: Shigeyuki TAKAGI, Masaki SHIMOMURA, Yuichi TAKEUCHI, Katsumi SUZUKI, Sachiko AOI