Abstract: A servo loop control apparatus having a master microprocessor and at least one autonomous streamlined signal processor is disclosed. The architecture provides a general purpose controller for use in systems where intensive servo signal processing is required and is well suited to applications where multiple servo control loops operate simultaneously. The operation of the streamlined signal processors is autonomous from the master processor so that critical functions can be dedicated to the streamlined signal processors. This eliminates complex interrupt management and tedious real time scheduling constraints, simplifies system design and improves system performance. The architecture provides an integrated mechanism for implementing multiple, concurrent, complex signal processing and embedded control functions, such as complete servo-mechanism management for high performance disk storage systems.

Abstract: Fast methods of tone detection and tone generation disclosed are particularly suitable for implementation in a digital signal processor. Chebyshev polynomials are employed to generate periodic waveforms and to detect such waveforms. In an alternative aspect of the invention, trigonometric formulae are employed to generate periodic waveforms which are representable as the sum of sine and cosine functions. Unlike analog techniques, the digital techniques do not entail long delays in the generation or detection of tones because a fast iterative recalculation is employed at each step. Accumulated error is avoided by restarting the procedure once a predetermined value is exceeded. Independent choice of a quality factor and a confidence level is provided by the digital tone detection technique.