Patents by Inventor Sahand Salamat

Sahand Salamat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240028512
    Abstract: Provided is a method of data storage, the method including receiving, from an application, a request to access data stored on a storage device, identifying a data access pattern of the application, and storing the data in a cache of the storage device based on the data access pattern.
    Type: Application
    Filed: August 18, 2022
    Publication date: January 25, 2024
    Inventors: Zongwang Li, Sahand Salamat, Rekha Pitchumani
  • Patent number: 11791838
    Abstract: An accelerator is disclosed. The accelerator may include a memory that may store a dictionary table. An address generator may be configured to generate an address in the dictionary table based on an encoded value, which may have an encoded width. An output filter may be configured to filter a decoded value from the dictionary table based on the encoded value, the encoded width, and a decoded width of the decoded data. The accelerator may be configured to support at least two different encoded widths.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: October 17, 2023
    Inventors: Sahand Salamat, Joo Hwan Lee, Armin Haj Aboutalebi, Praveen Krishnamoorthy, Xiaodong Zhao, Hui Zhang, Yang Seok Ki
  • Publication number: 20220231698
    Abstract: An accelerator is disclosed. The accelerator may include a memory that may store a dictionary table. An address generator may be configured to generate an address in the dictionary table based on an encoded value, which may have an encoded width. An output filter may be configured to filter a decoded value from the dictionary table based on the encoded value, the encoded width, and a decoded width of the decoded data. The accelerator may be configured to support at least two different encoded widths.
    Type: Application
    Filed: June 24, 2021
    Publication date: July 21, 2022
    Inventors: Sahand SALAMAT, JOO HWAN LEE, ARMIN HAJ ABOUTALEBI, PRAVEEN KRISHNAMOORTHY, XIAODONG ZHAO, HUI ZHANG, YANG SEOK KI
  • Patent number: 11249651
    Abstract: A storage system includes: a storage device to store an array of data elements associated with a sort operation; a storage interface to facilitate communications between the storage device and a host computer; and a reconfigurable processing device communicably connected to the storage device, the reconfigurable processing device including: memory to store input data read from the storage device, the input data corresponding to the array of data elements stored in the storage device; and a kernel including one or more compute components to execute the sort operation on the input data stored in the memory according to a SORT command received from the host computer. The reconfigurable processing device is to dynamically instantiate the one or more compute components to accelerate the sort operation.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: February 15, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sahand Salamat, Hui Zhang, Joo Hwan Lee, Yang Seok Ki
  • Publication number: 20220019441
    Abstract: A hyperdimensional processing system can be configured to process hyperdimensional (HD) data, where the system can include a CPU configured to receive compiled binary executable data including CPU native instructions and hyperdimensional processing unit (HPU) native instructions, wherein the CPU is configured to store the CPU native instructions in a main memory coupled to the CPU for retrieval and execution by the CPU, the CPU further configured to forward the HPU native instructions to a HPU. The HPU can be configured to receive HPU native instructions native instructions and to store the HPU native instructions in a hyperdimensional memory coupled to the HPU for retrieval and execution by the CPU. Other aspects and embodiments according to the present invention are also disclosed herein.
    Type: Application
    Filed: July 14, 2021
    Publication date: January 20, 2022
    Inventors: Tajana Simunic Rosing, Justin Morris, Mohsen Imani, Yeseong Kim, John Messerly, Yunhui Guo, Behnam Khaleghi, Saransh Gupta, Sahand Salamat, Joonseop Sim
  • Publication number: 20210334703
    Abstract: A method of defining an implementation of circuits in a programmable device can be provided by receiving a plurality of specifications for a hyperdimensional (HD) computing machine learning application for execution on a programmable device, determining parameters for a template architecture for HD computing machine learning using the plurality of specifications, the template architecture including an HD hypervector encoder, an HD associative search unit, programmable device pre-defined processing units, and programmable device pre-defined processing elements within the pre-defined processing units, and generating programmable device code configured to specify resources to be allocated within the programmable device using pre-defined circuits defined for use in the programmable device using the determined parameters for the template architecture.
    Type: Application
    Filed: April 21, 2021
    Publication date: October 28, 2021
    Inventors: Sahand Salamat, Mohsen Imani, Behnam Khaleghi, Tajana Rosing
  • Publication number: 20210326756
    Abstract: A method of providing a trained machine learning model can include providing a trained non-binary hyperdimensional machine learning model that includes a plurality of trained hypervector classes, wherein each of the trained hypervector classes includes N elements, and then, eliminating selected ones of the N elements from the trained non-binary hyperdimensional machine learning model based on whether the selected element has a similarity with other ones of the N elements, to provide a sparsified trained non-binary hyperdimensional machine learning model.
    Type: Application
    Filed: April 7, 2021
    Publication date: October 21, 2021
    Inventors: Behnam Khaleghi, Tajana Simunic Rosing, Mohsen Imani, Sahand Salamat
  • Publication number: 20210124500
    Abstract: A storage system includes: a storage device to store an array of data elements associated with a sort operation; a storage interface to facilitate communications between the storage device and a host computer; and a reconfigurable processing device communicably connected to the storage device, the reconfigurable processing device including: memory to store input data read from the storage device, the input data corresponding to the array of data elements stored in the storage device; and a kernel including one or more compute components to execute the sort operation on the input data stored in the memory according to a SORT command received from the host computer. The reconfigurable processing device is to dynamically instantiate the one or more compute components to accelerate the sort operation.
    Type: Application
    Filed: March 17, 2020
    Publication date: April 29, 2021
    Inventors: Sahand Salamat, Hui Zhang, Joo Hwan Lee, Yang Seok Ki