Abstract: In certain embodiments, a computer-implemented method of comparing financial parameters includes providing a first value representing at least a first financial parameter, providing a second value representing at least a second financial parameter, and calculating in a computer a ratio index comprising a time sequence of the ratio of the first value to the second value. In some embodiments, the method further includes creating a financial instrument, wherein the price of the financial instrument is based at least in part on the ratio index. In one embodiment, the financial instrument is an asset-liability derivative having an underlying comprising the ratio index.

Abstract: A high speed voltage mode sensing is provided for a digital multibit non-volatile memory integrated system. An embodiment has a local source follower stage followed by a high speed common source stage. Another embodiment has a local source follower stage followed by a high speed source follower stage. Another embodiment has a common source stage followed by a source follower. An auto zeroing scheme is used. A capacitor sensing scheme is used. Multilevel parallel operation is described.

Abstract: A high voltage generator provides high voltage signals with different regulated voltage levels. A charge pump generates the high voltage, and includes a quadrature phase forward and backward Vt-canceling high-voltage self-biasing charge pump with a powerup-assist diode. A high voltage series regulator generates the high voltage supply levels, and includes slew rate enhancement and trimmable diode regulation. A nested loop regulator eliminates shunt regulation.

Abstract: A high voltage generator provides high voltage signals with different regulated voltage levels. A charge pump generates the high voltage, and includes a quadrature phase forward and backward Vt-canceling high-voltage self-biasing charge pump with a powerup-assist diode. A high voltage series regulator generates the high voltage supply levels, and includes slew rate enhancement and trimmable diode regulation. A nested loop regulator eliminates shunt regulation.

Abstract: A digital multilevel bit memory array system comprises regular memory arrays and redundant memory arrays. A regular y-driver corresponds to each memory array to read or write contents to a multilevel bit memory cell and compare the read cell content to reference voltage levels to determine the data stored in the corresponding memory cell. Likewise, similar functions are performed by the redundant y-driver circuit for the redundant memory array. During the verification of the contents of the memory cell, if the read voltage is outside a certain margin requirement for a level of the reference voltage, a signal is generated in real time so that data from the bad y-driver is not output and data from the redundant y-driver corresponding to the redundant memory array is read out. The memory array system may also include a fractional multilevel redundancy.

Abstract: Method and apparatus for adjustment and control of an iterative method of recording analog signals with on-chip trimming techniques for later playback. The invention allows setting of various parameters for the multi iterative programming technique after chip fabrication so as to allow tighter control and thus higher resolution analog signal sample storage in a given or minimum amount of time. Such parameters include, but are not limited to: the step down voltage from the coarse programming cycle to the fine programming cycle, the incremental voltage increase between each fine pulse, the pulse width of each fine pulse, the number of fine pulses, the incremental voltage increase between each coarse pulse, the pulse width of each course pulse, the number of coarse pulses, and the offset, VOS, which stops further coarse pulses and holds the last coarse level as a reference for the following fine cycle.

Abstract: Programmable non-volatile analog voltage source devices and methods wherein analog voltages may be sampled and stored in a non-volatile manner for output, typically through parallel output buffers. In one form and in a single integrated circuit, an input provided to the circuit may be stored at any analog storage location as determined by an address also provided to the circuit, the storage location determining at which of the outputs of the circuit the stored value will appear. While the storage, achieved by way of storage of differential voltages in floating gate MOSFET devices, is non-volatile, the same is also electrically alterable as desired. Various alternate embodiments and methods including the ability to address multiple pages of analog storage locations for storage of analog signals and selective parallel output of each page of the storage, output enable capabilities, parallel inputs and digital inputs are disclosed.

Abstract: For use in integrated circuit systems wherein both filter time constants and oscillator frequency each need a suitable reference, both the filter and the oscillator are referenced to common reference circuitry through a suitable control loop. Because the fundamental control parameters of the oscillator and the filter are time-period and time-constant respectively, the oscillator and the filter are implemented in a manner where the monolithic passive elements setting the fundamental control parameters (time-period and time-constant) are of the same type. This has the advantage of close tracking through process and ambient variations. Monolithic capacitors on the same chip are used as one of the common passive elements between the oscillator and the filter to set the time-period and time-constants, respectively, adjustable through adjustment of control currents.

Abstract: For use in integrated circuit systems wherein both filter time constants and oscillator frequency each need a suitable reference, both the filter and the oscillator are referenced to common reference circuitry through a suitable control loop. Because the fundamental control parameters of the oscillator and the filter are time-period and time-constant respectively, the oscillator and the filter are implemented in a manner where the monolithic passive elements setting the fundamental control parameters (time-period and time-constant) are of the same type. This has the advantage of close tracking through process and ambient variations. Monolithic capacitors on the same chip are used as one of the common passive elements between the oscillatorand the filter to set the time-period and time-constants, respectively, adjustable through adjustment of control currents.

Abstract: Integrated circuit system for analog signal recording and playback having improved performance and a very high level of integration. The integrated circuit is complete with preamplifier, automatic gain control, filter, fixed references including a band gap reference, trimming, power output amplifier, memory array, multiple closed loop sample and hold circuits, column decoder, column driver, row decoder, address counters, master oscillator and chip function timing circuits including sample clock, charge pumps, high voltage regulator and waveshapers, low VCC detector, power-on reset and recording reference circuits on a single chip. The system uses a writable analog reference scheme to put many error sources in the common mode, and provides a double ended output for maximum power output in a limited voltage range, and to allow direct connection to a speaker.