Patents by Inventor Saldamli Gokay

Saldamli Gokay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Modular multiplication method, modular multiplier and cryptosystem having the same
    Patent number: 8055696
    Abstract: Provided are a modular multiplication method with an improved arithmetic operation, a modular multiplier and a cryptograph calculating system having the modular multiplier. The modular multiplication method comprises performing a first arithmetic operation including a first multiplication on a first bit string of a multiplicand and a first bit string of a multiplier and a first reduction for eliminating partial bits of the first multiplication result, performing a second arithmetic operation including a second multiplication on a second bit string of the multiplicand and a second bit string of the multiplier and a second reduction for eliminating partial bits of the second multiplication result, and calculating a modular multiplication result using the result of the first arithmetic operation and the result of the second arithmetic result. The first arithmetic operation and the second arithmetic operation are independently performed.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Saldamli Gokay, Yoo-Jin Baek
  • Modular multiplication method, modular multiplier and cryptosystem having the same
    Publication number: 20090100120
    Abstract: Provided are a modular multiplication method with an improved arithmetic operation, a modular multiplier and a cryptograph calculating system having the modular multiplier. The modular multiplication method comprises performing a first arithmetic operation including a first multiplication on a first bit string of a multiplicand and a first bit string of a multiplier and a first reduction for eliminating partial bits of the first multiplication result, performing a second arithmetic operation including a second multiplication on a second bit string of the multiplicand and a second bit string of the multiplier and a second reduction for eliminating partial bits of the second multiplication result, and calculating a modular multiplication result using the result of the first arithmetic operation and the result of the second arithmetic result. The first arithmetic operation and the second arithmetic operation are independently performed.
    Type: Application
    Filed: October 31, 2007
    Publication date: April 16, 2009
    Inventors: Saldamli Gokay, Yoo-Jin Baek