Patents by Inventor Salman Ahsan

Salman Ahsan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10131321
    Abstract: Method and apparatus are disclosed for a system for keyless entry. An example vehicle includes a valet dongle, a dock configured to connect to the valet dongle; and a valet manager. The valet manager enables the valet dongle to authorize keyless entry and keyless ignition when (a) the valet dongle is removed from the dock while an ignition of the vehicle is on and (b) an authorized passcode is provided via an infotainment head unit.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: November 20, 2018
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Salman Ahsan, Vivekanandh Elangovan, Kevin Thomas Hille, Gregory William Farrey, Thomas Kasper
  • Patent number: 7402480
    Abstract: The individual performance of various transistors is optimized by tailoring the thickness of the gate oxide layer to a particular operating voltage. Embodiments include forming transistors with different gate oxide thicknesses by initially depositing one or more gate oxide layers with intermediate etching to remove the deposited oxide from active regions wherein transistors with relatively thinner gate oxides are to be formed, and then implementing one or more thermal oxidation steps. Embodiments include forming semiconductor devices comprising transistors with two different gate oxide thicknesses by initially depositing an oxide film, selectively removing the deposited oxide film from active areas in which low voltage transistors having a relatively thin gate oxide are to be formed, and then implementing thermal oxidation.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: July 22, 2008
    Assignee: Linear Technology Corporation
    Inventors: François Hébert, Salman Ahsan
  • Publication number: 20060003511
    Abstract: The individual performance of various transistors is optimized by tailoring the thickness of the gate oxide layer to a particular operating voltage. Embodiments include forming transistors with different gate oxide thicknesses by initially depositing one or more gate oxide layers with intermediate etching to remove the deposited oxide from active regions wherein transistors with relatively thinner gate oxides are to be formed, and then implementing one or more thermal oxidation steps. Embodiments include forming semiconductor devices comprising transistors with two different gate oxide thicknesses by initially depositing an oxide film, selectively removing the deposited oxide film from active areas in which low voltage transistors having a relatively thin gate oxide are to be formed, and then implementing thermal oxidation.
    Type: Application
    Filed: July 1, 2004
    Publication date: January 5, 2006
    Inventors: Francois Hebert, Salman Ahsan