Patents by Inventor Salvatore Giove
Salvatore Giove has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11586540Abstract: Apparatuses, systems, and methods to perform continuous read operations are described. A system configured to perform such continuous read operations enables improved access to and processing of data for performance of associated functions. For instance, one apparatus described herein includes a memory device having an array that includes a plurality of pages of memory cells. The memory device includes a page buffer coupled to the array and a continuous read buffer. The continuous read buffer includes a first cache to receive a first segment of data values and a second cache to receive a second segment of the data values from the page buffer. The memory device is configured to perform a continuous read operation on the first and second segments of data from the first cache and the second cache of the continuous read buffer.Type: GrantFiled: August 10, 2021Date of Patent: February 21, 2023Assignee: Micron Technology, Inc.Inventors: Antonino Mondello, Francesco Tomaiuolo, Salvatore Giove, Pierluca Guarino, Fabio Indelicato, Marco Ruta, Maria Luisa Gambina, Giovanni Nunzio Maria Avenia, Carmela Maria Calafato
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Publication number: 20210365375Abstract: Apparatuses, systems, and methods to perform continuous read operations are described. A system configured to perform such continuous read operations enables improved access to and processing of data for performance of associated functions. For instance, one apparatus described herein includes a memory device having an array that includes a plurality of pages of memory cells. The memory device includes a page buffer coupled to the array and a continuous read buffer. The continuous read buffer includes a first cache to receive a first segment of data values and a second cache to receive a second segment of the data values from the page buffer. The memory device is configured to perform a continuous read operation on the first and second segments of data from the first cache and the second cache of the continuous read buffer.Type: ApplicationFiled: August 10, 2021Publication date: November 25, 2021Inventors: Antonino Mondello, Francesco Tomaiuolo, Salvatore Giove, Pierluca Guarino, Fabio Indelicato, Marco Ruta, Maria Luisa Gambina, Giovanni Nunzio Maria Avenia, Carmela Maria Calafato
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Patent number: 11093392Abstract: Apparatuses, systems, and methods to perform continuous read operations are described. A system configured to perform such continuous read operations enables improved access to and processing of data for performance of associated functions. For instance, one apparatus described herein includes a memory device having an array that includes a plurality of pages of memory cells. The memory device includes a page buffer coupled to the array and a continuous read buffer. The continuous read buffer includes a first cache to receive a first segment of data values and a second cache to receive a second segment of the data values from the page buffer. The memory device is configured to perform a continuous read operation on the first and second segments of data from the first cache and the second cache of the continuous read buffer.Type: GrantFiled: April 9, 2020Date of Patent: August 17, 2021Assignee: Micron Technology, Inc.Inventors: Antonino Mondello, Francesco Tomaiuolo, Salvatore Giove, Pierluca Guarino, Fabio Indelicato, Marco Ruta, Maria Luisa Gambina, Giovanni Nunzio Maria Avenia, Carmela Maria Calafato
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Publication number: 20200242033Abstract: Apparatuses, systems, and methods to perform continuous read operations are described. A system configured to perform such continuous read operations enables improved access to and processing of data for performance of associated functions. For instance, one apparatus described herein includes a memory device having an array that includes a plurality of pages of memory cells. The memory device includes a page buffer coupled to the array and a continuous read buffer. The continuous read buffer includes a first cache to receive a first segment of data values and a second cache to receive a second segment of the data values from the page buffer. The memory device is configured to perform a continuous read operation on the first and second segments of data from the first cache and the second cache of the continuous read buffer.Type: ApplicationFiled: April 9, 2020Publication date: July 30, 2020Inventors: Antonino Mondello, Francesco Tomaiuolo, Salvatore Giove, Pierluca Guarino, Fabio Indelicato, Marco Ruta, Maria Luisa Gambina, Giovanni Nunzio Maria Avenia, Carmela Maria Calafato
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Patent number: 10621091Abstract: Apparatuses, systems, and methods to perform continuous read operations are described. A system configured to perform such continuous read operations enables improved access to and processing of data for performance of associated functions. For instance, one apparatus described herein includes a memory device having an array that includes a plurality of pages of memory cells. The memory device includes a page buffer coupled to the array and a continuous read buffer. The continuous read buffer includes a first cache to receive a first segment of data values and a second cache to receive a second segment of the data values from the page buffer. The memory device is configured to perform a continuous read operation on the first and second segments of data from the first cache and the second cache of the continuous read buffer.Type: GrantFiled: May 4, 2018Date of Patent: April 14, 2020Assignee: Micron Technology, Inc.Inventors: Antonino Mondello, Francesco Tomaiuolo, Salvatore Giove, Pierluca Guarino, Fabio Indelicato, Marco Ruta, Maria Luisa Gambina, Giovanni Nunzio Maria Avenia, Carmela Maria Calafato
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Publication number: 20190340125Abstract: Apparatuses, systems, and methods to perform continuous read operations are described. A system configured to perform such continuous read operations enables improved access to and processing of data for performance of associated functions. For instance, one apparatus described herein includes a memory device having an array that includes a plurality of pages of memory cells. The memory device includes a page buffer coupled to the array and a continuous read buffer. The continuous read buffer includes a first cache to receive a first segment of data values and a second cache to receive a second segment of the data values from the page buffer. The memory device is configured to perform a continuous read operation on the first and second segments of data from the first cache and the second cache of the continuous read buffer.Type: ApplicationFiled: May 4, 2018Publication date: November 7, 2019Inventors: Antonino Mondello, Francesco Tomaiuolo, Salvatore Giove, Pierluca Guarino, Fabio Indelicato, Marco Ruta, Maria Luisa Gambina, Giovanni Nunzio Maria Avenia, Carmela Maria Calafato
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Patent number: 9378157Abstract: Various embodiments comprise apparatuses and methods to allow access to a memory device by an external device. A method includes receiving, at the memory device, a request from the external device to access a storage area of the memory device and performing an unlock procedure of the storage area. The unlock procedure includes sending a first code from the memory device to the external device, and receiving a second code at the memory device from the external device. The second code is to be generated by a first encryption process performed on the first code to obtain the second code. The storage area is temporarily unlocked to allow the external device to access the storage area based on a determination that the received second code has a predetermined relationship to the first code. Additional apparatuses and methods are described.Type: GrantFiled: July 7, 2014Date of Patent: June 28, 2016Assignee: Micron Technology, Inc.Inventors: Marco Messina, Antonino Capri', Salvatore Giove, Antonino La Spina, Vijay Malhi
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Publication number: 20140325176Abstract: Various embodiments comprise apparatuses and methods to allow access to a memory device by an external device. A method includes receiving, at the memory device, a request from the external device to access a storage area of the memory device and performing an unlock procedure of the storage area. The unlock procedure includes sending a first code from the memory device to the external device, and receiving a second code at the memory device from the external device. The second code is to be generated by a first encryption process performed on the first code to obtain the second code. The storage area is temporarily unlocked to allow the external device to access the storage area based on a determination that the received second code has a predetermined relationship to the first code. Additional apparatuses and methods are described.Type: ApplicationFiled: July 7, 2014Publication date: October 30, 2014Inventors: Marco Messina, Antonino Capri', Salvatore Giove, Antonino La Spina, Vijay Malhi
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Patent number: 8776174Abstract: Various embodiments comprise apparatuses and methods to allow access to a memory device by an external device. A method includes receiving, at the memory device, a request from the external device to access a storage area of the memory device and performing an unlock procedure of the storage area. The unlock procedure includes sending a first code from the memory device to the external device, and receiving a second code at the memory device from the external device. The second code is to be generated by a first encryption process performed on the first code to obtain the second code. The storage area is temporarily unlocked to allow the external device to access the storage area based on a determination that the received second code has a predetermined relationship to the first code. Additional apparatuses and methods are described.Type: GrantFiled: September 13, 2012Date of Patent: July 8, 2014Assignee: Micron Technology, Inc.Inventors: Marco Messina, Antonino Capriā², Salvatore Giove, Antonino La Spina, Vijay Malhi
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Publication number: 20130014215Abstract: Various embodiments comprise apparatuses and methods to allow access to a memory device by an external device. A method includes receiving, at the memory device, a request from the external device to access a storage area of the memory device and performing an unlock procedure of the storage area. The unlock procedure includes sending a first code from the memory device to the external device, and receiving a second code at the memory device from the external device. The second code is to be generated by a first encryption process performed on the first code to obtain the second code. The storage area is temporarily unlocked to allow the external device to access the storage area based on a determination that the received second code has a predetermined relationship to the first code. Additional apparatuses and methods are described.Type: ApplicationFiled: September 13, 2012Publication date: January 10, 2013Inventors: Marco MESSINA, Antonino CAPRI', Salvatore GIOVE, Antonino LA SPINA, Vijay MALHI
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Patent number: 8276185Abstract: A memory device includes: at least one storage area for storing data; a protection control structure adapted to selectively allow an external device access to the at least one storage area of the memory, the storage area being not freely accessible by the external device if protected; a control logic adapted to identify an access request by the external device to the at least one storage area and cooperating with the protection control structure for managing an unlock procedure for selectively granting the external device at least temporary access rights to the storage area if protected; means for providing a first code to the external device in said unlock procedure; means for receiving a second code from the external device in response to said first code; means for verifying validity of the received second code. The means for verifying validity are adapted to ascertain a correspondence of the second code with the first code based on a predetermined relationship.Type: GrantFiled: January 19, 2006Date of Patent: September 25, 2012Assignee: Micron Technology, Inc.Inventors: Marco Messina, Antonino Capri', Salvatore Giove, Antonino La Spina, Vijay Malhi
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Publication number: 20080189557Abstract: A memory device including at least one storage area for storing data and a protection control structure adapted to selectively allow an external device access to the at least one storage area of the memory, the storage area being not freely accessible by the external device if protected. The memory device further includes a control logic adapted to identify an access request by the external device to the at least one storage area and cooperating with the protection control structure for managing an unlock procedure for selectively granting the external device at least temporary access rights to the storage area if protected.Type: ApplicationFiled: January 19, 2006Publication date: August 7, 2008Inventors: Francesco Pipitone, Francesco Tomaiuolo, Marco Messina, Alessandro Raimondo, Vijay Malhi, Salvatore Giove
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Publication number: 20070192828Abstract: A memory device includes: at least one storage area for storing data; a protection control structure adapted to selectively allow an external device access to the at least one storage area of the memory, the storage area being not freely accessible by the external device if protected; a control logic adapted to identify an access request by the external device to the at least one storage area and cooperating with the protection control structure for managing an unlock procedure for selectively granting the external device at least temporary access rights to the storage area if protected; means for providing a first code to the external device in said unlock procedure; means for receiving a second code from the external device in response to said first code; means for verifying validity of the received second code. The means for verifying validity are adapted to ascertain a correspondence of the second code with the first code based on a predetermined relationship.Type: ApplicationFiled: January 19, 2006Publication date: August 16, 2007Inventors: Marco Messina, Antonino Capri, Salvatore Giove, Antonino La Spina, Vijay Malhi
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Patent number: 6801466Abstract: A circuit for controlling a reference node in a sense amplifier switchable between an operating mode and a stand-by mode is provided. The reference node provides a reference voltage in the operating mode. The circuit may include circuitry for bringing the reference node to a starting voltage upon entry into the stand-by mode, circuitry for keeping the reference node at a pre-charging voltage in the stand-by mode, and circuitry for providing a comparison voltage closer to the pre-charging voltage than the starting voltage. Pulling circuitry may also be included for pulling the reference node toward a power supply voltage. Further, a controller may activate the pulling circuitry upon entering the stand-by mode, and disable the pulling circuitry when the voltage at the reference node reaches the comparison voltage.Type: GrantFiled: December 27, 2002Date of Patent: October 5, 2004Assignee: STMicroelectronics S.r.l.Inventors: Salvatore Giove, Luca De Ambroggi, Salvatore Nicosia, Francesco Tomaiulo, Kumar Promod, Giuseppe Piazza, Francesco Pipitone
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Publication number: 20030142568Abstract: A circuit for controlling a reference node in a sense amplifier switchable between an operating mode and a stand-by mode is provided. The reference node provides a reference voltage in the operating mode. The circuit may include circuitry for bringing the reference node to a starting voltage upon entry into the stand-by mode, circuitry for keeping the reference node at a pre-charging voltage in the stand-by mode, and circuitry for providing a comparison voltage closer to the pre-charging voltage than the starting voltage. Pulling circuitry may also be included for pulling the reference node toward a power supply voltage. Further, a controller may activate the pulling circuitry upon entering the stand-by mode, and disable the pulling circuitry when the voltage at the reference node reaches the comparison voltage.Type: ApplicationFiled: December 27, 2002Publication date: July 31, 2003Applicant: STMicroelectronics S.r.I.Inventors: Salvatore Giove, Luca De Ambroggi, Salvatore Nicosia, Francesco Tomaiulo, Kumar Promod, Giuseppe Piazza, Francesco Pipitone