Abstract: Structures and processes are provided that can be used for effectively integrating different transistor designs across a process platform. In particular, a bifurcated process is provided in which dopants and other processes for forming some transistor types may be performed prior to STI or other device isolation processes, and other devices may be formed thereafter. Thus, doping and other steps and their sequence with respect to the STI process can be selected to be STI-first or STI-last, depending on the device type to be manufactured, the range of device types that are manufactured on the same wafer or die, or the range of device types that are planned to be manufactured using the same or similar mask sets.

Abstract: The present description relates the formation of a first level interlayer dielectric material layer within a non-planar transistor, which may be formed by a spin-on coating technique followed by oxidation and annealing. The first level interlayer dielectric material layer may be substantially void free and may exert a tensile strain on the source/drain regions of the non-planar transistor.

Abstract: A semiconductor structure is formed with a NFET device and a PFET device. The NFET device is formed by masking the PFET device regions of a substrate, forming a screen layer through epitaxial growth and in-situ doping, and forming an undoped channel layer on the screen layer through epitaxial growth. The PFET device is similarly formed by masking the NFET regions of a substrate, forming a screen layer through epitaxial growth and in-situ doping, and forming an undoped channel layer on the screen layer through epitaxial growth. An isolation region is formed between the NFET and the PFET device areas to remove any facets occurring during the separate epitaxial growth phases. By forming the screen layer through in-situ doped epitaxial growth, a reduction in junction leakage is achieved versus forming the screen layer using ion implantation.

Abstract: A semiconductor transistor structure fabricated on a silicon substrate effective to set a threshold voltage, control short channel effects, and control against excessive junction leakage may include a transistor gate having a source and drain structure. A highly doped screening region lies is embedded a vertical distance down from the surface of the substrate. The highly doped screening region is separated from the surface of the substrate by way of a substantially undoped channel layer which may be epitaxially formed. The source/drain structure may include a source/drain extension region which may be raised above the surface of the substrate. The screening region is preferably positioned to be located at or just below the interface between the source/drain region and source/drain extension portion. The transistor gate may be formed below a surface level of the silicon substrate and either above or below the heavily doped portion of the source/drain structure.

Abstract: A semiconductor structure is formed with a NFET device and a PFET device. The NFET device is formed by masking the PFET device regions of a substrate, forming a screen layer through epitaxial growth and in-situ doping, and forming an undoped channel layer on the screen layer through epitaxial growth. The PFET device is similarly formed by masking the NFET regions of a substrate, forming a screen layer through epitaxial growth and in-situ doping, and forming an undoped channel layer on the screen layer through epitaxial growth. An isolation region is formed between the NFET and the PFET device areas to remove any facets occurring during the separate epitaxial growth phases. By forming the screen layer through in-situ doped epitaxial growth, a reduction in junction leakage is achieved versus forming the screen layer using ion, implantation.

Abstract: Disclosed herein are novel compositions for biobleaching coupled with stone washing of indigo dyed denims comprising a blend of glucose oxidase, catalases and cellulases in the ratio of 1.0:10.0:1.0 along with sugar base, peroxide source and optional adjuvants and a process for the said biobleaching coupled with stone washing wherein the process is carried out at optimized conditions of neutral pH (6.5-7.0) and a temperature of 55° C. Processing time may vary from 15 minutes to 90 minutes depending on the extent of bleach required for the fabric.

Abstract: A silicon electro-optic waveguide modulator is formed using a metal-oxide-semiconductor (MOS) configuration. Various embodiments are described using different modes of operation of the MOS diode and gate oxide thicknesses. In one example, a high-speed submicron waveguide active device is formed using silicon-on-insulator. A micro-ring resonator intensity-modulator exhibits switching times on the order of tens of pS with modulation depth of 73% with a bias voltage of 5 volts.

Abstract: A silicon electro-optic waveguide modulator is formed using a metal-oxide-semiconductor (MOS) configuration. Various embodiments are described using different modes of operation of the MOS diode and gate oxide thicknesses. In one example, a high-speed submicron waveguide active device is formed using silicon-on-insulator. A micro-ring resonator intensity-modulator exhibits switching times on the order of tens of pS with modulation depth of 73% with a bias voltage of 5 volts.

Abstract: A Whole egg replacing novel premix concentrate specially designed for cake and cake related products wherein the said premix comprises isolates of protein from gramineae family—10-30% with isolates of milk based protein ranging from 20-40% and in conjunction with the emulsifier ranging from 5-15%, leavening system ranging from 1-10%, stabilizers such as calcium, sodium, potassium salts at about 7-10% with filler as starch and starch hydrolyzates.

Abstract: Disclosed herein are novel compositions for biobleaching coupled with stone washing of indigo dyed denims comprising a blend of glucose oxidase, catalases and cellulases in the ratio of 1.0:10.0:1.0 along with sugar base, peroxide source and optional adjuvants and a process for the said biobleaching coupled with stone washing wherein the process is carried out at optimized conditions of neutral pH (6.5-7.0) and a temperature of 55° C. Processing time may vary from 15 minutes to 90 minutes depending on the extent of bleach required for the fabric.

Abstract: A silicon electro-optic waveguide modulator is formed using a metal-oxide-semiconductor (MOS) configuration. Various embodiments are described using different modes of operation of the MOS diode and gate oxide thicknesses. In one example, a high-speed submicron waveguide active device is formed using silicon-on-insulator. A micro-ring resonator intensity-modulator exhibits switching times on the order of tens of pS with modulation depth of 73% with a bias voltage of 5 volts.