Patents by Inventor Samuel J. Miller

Samuel J. Miller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10163534
    Abstract: A computerized system for modeling reactor fuel element and fuel design to determine the thermo-mechanical performance thereof includes a processor coupled to memory, the memory configuring the processor to execute a fuel element analysis and an output configured to communicate data that describes the thermo-mechanical performance of the fuel element and fuel design based on the fuel element performance analysis. The processor is configured to estimate the mechanical behavior of a fuel by creating separate variables for the open and closed porosity components, conducting a routine for the open and closed porosity components that processes the current state of the fuel and updates the current state and forces of each of the open and closed porosity components, and combining the updates for the current state and forces according to a weighting; and estimate the creep and swelling behavior of a cladding.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: December 25, 2018
    Assignee: TerraPower, LLC
    Inventors: Micah Hackett, Ryan Latta, Samuel J. Miller, Gary Povirk, Mark R. Werner, Cheng Xu
  • Patent number: 10159057
    Abstract: A device, system, and method persists network registration rejection causes. The method is performed at a device connected to a network and comprising a temporary memory and a persistent memory, the device using the data stored in the temporary memory when performing network registration operations. When a power cycle is detected, the method includes determining whether there is persistent data in the persistent memory for a first attempt to register with the network prior to the power cycle, the persistent data including a rejection cause for the first attempt. When there is the persistent data in the persistent memory, the method includes determining whether the persistent data is valid for a second attempt to register with the network after the power cycle. When the persistent data is valid, the method includes generating and storing cause data based on the persistent data in the temporary memory prior to the second attempt.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: December 18, 2018
    Assignee: APPLE INC.
    Inventors: Utkarsh Kumar, Lakshmi N. Kavuri, Samuel J. Miller, Harshit Chuttani, Rohan Malthankar, Francisco Gonzalez
  • Publication number: 20180352529
    Abstract: A device, system, and method persists network registration rejection causes. The method is performed at a device connected to a network and comprising a temporary memory and a persistent memory, the device using the data stored in the temporary memory when performing network registration operations. When a power cycle is detected, the method includes determining whether there is persistent data in the persistent memory for a first attempt to register with the network prior to the power cycle, the persistent data including a rejection cause for the first attempt. When there is the persistent data in the persistent memory, the method includes determining whether the persistent data is valid for a second attempt to register with the network after the power cycle. When the persistent data is valid, the method includes generating and storing cause data based on the persistent data in the temporary memory prior to the second attempt.
    Type: Application
    Filed: June 2, 2017
    Publication date: December 6, 2018
    Inventors: Utkarsh KUMAR, Lakshmi N. KAVURI, Samuel J. MILLER, Harshit CHUTTANI, Rohan MALTHANKAR, Francisco GONZALEZ
  • Publication number: 20180352425
    Abstract: Techniques to manage updates for eSIMs of a secondary wireless device are disclosed. Responsive to a user input, expiration of a timer, receipt of a message from an associated primary wireless device, processing circuitry of the secondary wireless device commands an eUICC to update an eSIM. A secure data connection is established between the eUICC and a network provisioning server, either directly from the secondary wireless device to a cellular wireless network or relayed indirectly via the primary wireless device. The eUICC and the network provisioning server exchange messages in accordance with a BIP process to update the eSIM. The eUICC provides a status to the processing circuitry indicating success or failure for the eSIM update. Upon success, a portion of the secondary wireless device may be placed in a reduced power state. Upon failure, the eSIM update process may repeat up to a maximum number of retries.
    Type: Application
    Filed: April 16, 2018
    Publication date: December 6, 2018
    Inventors: Chandiramohan VASUDEVAN, Rohan C. MALTHANKAR, Prashant H. VASHI, Viswanath NAGARAJAN, Vikram Bhaskara YERRABOMMANAHALLI, Rafael L. RIVERA-BARRETO, Samuel J. MILLER, Kannan JEYAKUMAR, Li LI
  • Publication number: 20180352514
    Abstract: This disclosure relates to dynamic baseband management for a wireless device. The wireless device may be an accessory device. The accessory device may determine whether it has a short-range wireless communication link with a companion device. The accessory device may determine one or more proximity metrics relating to the companion device. The accessory device may further determine one or more metrics associated with user settings, user activity and/or application activity at the wireless device. The wireless device may select a (e.g., full, limited, or off) baseband operating mode based on any or all of these considerations.
    Type: Application
    Filed: April 27, 2018
    Publication date: December 6, 2018
    Inventors: Ajoy K. Singh, Jared S. Grubb, Madhusudan Chaudhary, Saran Krishnaswamy, Jesus A. Gutierrez Gomez, Sirisha Pillalamarri, Samuel J. Miller, Rohan C. Malthankar, Sergey Sitnikov, Ziv Wolkowicki, Dimitrios Prodanos, Andreas E. Schobel, Christopher P. Saari, Keith W. Rauenbuehler, Rafael L. Rivera-Barreto, Najeeb M. Abdulrahiman
  • Patent number: 10149150
    Abstract: Techniques to manage updates for eSIMs of a secondary wireless device are disclosed. Responsive to a user input, expiration of a timer, receipt of a message from an associated primary wireless device, processing circuitry of the secondary wireless device commands an eUICC to update an eSIM. A secure data connection is established between the eUICC and a network provisioning server, either directly from the secondary wireless device to a cellular wireless network or relayed indirectly via the primary wireless device. The eUICC and the network provisioning server exchange messages in accordance with a BIP process to update the eSIM. The eUICC provides a status to the processing circuitry indicating success or failure for the eSIM update. Upon success, a portion of the secondary wireless device may be placed in a reduced power state. Upon failure, the eSIM update process may repeat up to a maximum number of retries.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: December 4, 2018
    Assignee: Apple Inc.
    Inventors: Chandiramohan Vasudevan, Rohan C. Malthankar, Prashant H. Vashi, Viswanath Nagarajan, Vikram Bhaskara Yerrabommanahalli, Rafael L. Rivera-Barreto, Samuel J. Miller, Kannan Jeyakumar, Li Li
  • Patent number: 10104202
    Abstract: Techniques are disclosed for loading programs efficiently in a parallel computing system. In one embodiment, nodes of the parallel computing system receive a load description file which indicates, for each program of a multiple program multiple data (MPMD) job, nodes which are to load the program. The nodes determine, using collective operations, a total number of programs to load and a number of programs to load in parallel. The nodes further generate a class route for each program to be loaded in parallel, where the class route generated for a particular program includes only those nodes on which the program needs to be loaded. For each class route, a node is selected using a collective operation to be a load leader which accesses a file system to load the program associated with a class route and broadcasts the program via the class route to other nodes which require the program.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: October 16, 2018
    Assignee: International Business Machines Corporation
    Inventors: Michael E. Aho, John E. Attinella, Thomas M. Gooding, Samuel J. Miller
  • Patent number: 9980230
    Abstract: This disclosure relates to dynamic baseband management for a wireless device. The wireless device may be an accessory device. The accessory device may determine whether it has a short-range wireless communication link with a companion device. The accessory device may determine one or more proximity metrics relating to the companion device. The accessory device may further determine one or more metrics associated with user settings, user activity and/or application activity at the wireless device. The wireless device may select a (e.g., full, limited, or off) baseband operating mode based on any or all of these considerations.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: May 22, 2018
    Assignee: Apple Inc.
    Inventors: Ajoy K. Singh, Ziv Wolkowicki, Dimitrios Prodanos, Andreas E. Schobel, Christopher P. Saari, Keith W. Rauenbuehler, Rafael L. Rivera-Barreto, Najeeb M. Abdulrahiman, Jared S. Grubb, Madhusudan Chaudhary, Saran Krishnaswamy, Jesus A. Gutierrez Gomez, Sirisha Pillalamarri, Samuel J. Miller, Rohan C. Malthankar, Sergey Sitnikov
  • Patent number: 9971713
    Abstract: A Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaflop-scale includes node architectures based upon System-On-a-Chip technology, where each processing node comprises a single Application Specific Integrated Circuit (ASIC). The ASIC nodes are interconnected by a five dimensional torus network that optimally maximize the throughput of packet communications between nodes and minimize latency. The network implements collective network and a global asynchronous network that provides global barrier and notification functions. Integrated in the node design include a list-based prefetcher. The memory system implements transaction memory, thread level speculation, and multiversioning cache that improves soft error rate at the same time and supports DMA functionality allowing for parallel processing message-passing.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: May 15, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Sameh Asaad, Ralph E. Bellofatto, Michael A. Blocksome, Matthias A. Blumrich, Peter Boyle, Jose R. Brunheroto, Dong Chen, Chen-Yong Cher, George L. Chiu, Norman Christ, Paul W. Coteus, Kristan D. Davis, Gabor J. Dozsa, Alexandre E. Eichenberger, Noel A. Eisley, Matthew R. Ellavsky, Kahn C. Evans, Bruce M. Fleischer, Thomas W. Fox, Alan Gara, Mark E. Giampapa, Thomas M. Gooding, Michael K. Gschwind, John A. Gunnels, Shawn A. Hall, Rudolf A. Haring, Philip Heidelberger, Todd A. Inglett, Brant L. Knudson, Gerard V. Kopcsay, Sameer Kumar, Amith R. Mamidala, James A. Marcella, Mark G. Megerian, Douglas R. Miller, Samuel J. Miller, Adam J. Muff, Michael B. Mundy, John K. O'Brien, Kathryn M. O'Brien, Martin Ohmacht, Jeffrey J. Parker, Ruth J. Poole, Joseph D. Ratterman, Valentina Salapura, David L. Satterfield, Robert M. Senger, Burkhard Steinmacher-Burow, William M. Stockdell, Craig B. Stunkel, Krishnan Sugavanam, Yutaka Sugawara, Todd E. Takken, Barry M. Trager, James L. Van Oosten, Charles D. Wait, Robert E. Walkup, Alfred T. Watson, Robert W. Wisniewski, Peng Wu
  • Patent number: 9949113
    Abstract: Techniques to manage updates for eSIMs of a secondary wireless device are disclosed. Responsive to a user input, expiration of a timer, receipt of a message from an associated primary wireless device, processing circuitry of the secondary wireless device commands an eUICC to update an eSIM. A secure data connection is established between the eUICC and a network provisioning server, either directly from the secondary wireless device to a cellular wireless network or relayed indirectly via the primary wireless device. The eUICC and the network provisioning server exchange messages in accordance with a BIP process to update the eSIM. The eUICC provides a status to the processing circuitry indicating success or failure for the eSIM update. Upon success, a portion of the secondary wireless device may be placed in a reduced power state. Upon failure, the eSIM update process may repeat up to a maximum number of retries.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: April 17, 2018
    Assignee: Apple Inc.
    Inventors: Chandiramohan Vasudevan, Rohan C. Malthankar, Prashant H. Vashi, Viswanath Nagarajan, Vikram Bhaskara Yerrabommanahalli, Rafael L. Rivera-Barreto, Samuel J. Miller, Kannan Jeyakumar, Li Li
  • Publication number: 20170212766
    Abstract: Techniques are disclosed for loading programs efficiently in a parallel computing system. In one embodiment, nodes of the parallel computing system receive a load description file which indicates, for each program of a multiple program multiple data (MPMD) job, nodes which are to load the program. The nodes determine, using collective operations, a total number of programs to load and a number of programs to load in parallel. The nodes further generate a class route for each program to be loaded in parallel, where the class route generated for a particular program includes only those nodes on which the program needs to be loaded. For each class route, a node is selected using a collective operation to be a load leader which accesses a file system to load the program associated with a class route and broadcasts the program via the class route to other nodes which require the program.
    Type: Application
    Filed: March 13, 2013
    Publication date: July 27, 2017
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael E. AHO, John E. ATTINELLA, Thomas M. GOODING, Samuel J. MILLER
  • Publication number: 20170145835
    Abstract: A cooling system (10) for a turbine airfoil (12) of a gas turbine engine having a bifurcated mid-chord cooling chamber (16) for cooling the airfoil (26) is disclosed. The bifurcated mid-chord cooling chamber (16) may be formed from a pressure side serpentine cooling channel (18) and a suction side serpentine cooling channel (20) with cooling fluids passing through the pressure side serpentine cooling channel (18) in a direction from the trailing edge (22) toward the leading edge (24) and in an opposite direction through the suction side serpentine cooling channel (20), thereby creating a counterflow system. The counterflow cooling scheme allows for better fine tuning of internal heat transfer which leads to more uniform temperature distributions than conventional systems.
    Type: Application
    Filed: August 7, 2014
    Publication date: May 25, 2017
    Applicant: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Samuel J. Miller, JR., Jan H. Marsh
  • Publication number: 20170062080
    Abstract: A fuel element has a ratio of area of fissionable nuclear fuel in a cross-section of the tubular fuel element perpendicular to the longitudinal axis to total area of the interior volume in the cross-section of the tubular fuel element that varies with position along the longitudinal axis. The ratio can vary with position along the longitudinal axis between a minimum of 0.30 and a maximum of 1.0. Increasing the ratio above and below the peak burn-up location associated with conventional systems reduces the peak burn-up and flattens and shifts the burn-up distribution, which is preferably Gaussian. The longitudinal variation can be implemented in fuel assemblies using fuel bodies, such as pellets, rods or annuli, or fuel in the form of metal sponge and meaningfully increases efficiency of fuel utilization.
    Type: Application
    Filed: August 24, 2016
    Publication date: March 2, 2017
    Inventors: Jesse R. Cheatham, III, Ryan N. Latta, Samuel J. Miller
  • Publication number: 20160379726
    Abstract: A computerized system for modeling reactor fuel element and fuel design to determine the thermo-mechanical performance thereof includes a processor coupled to memory, the memory configuring the processor to execute a fuel element analysis and an output configured to communicate data that describes the thermo-mechanical performance of the fuel element and fuel design based on the fuel element performance analysis. The processor is configured to estimate the mechanical behavior of a fuel by creating separate variables for the open and closed porosity components, conducting a routine for the open and closed porosity components that processes the current state of the fuel and updates the current state and forces of each of the open and closed porosity components, and combining the updates for the current state and forces according to a weighting; and estimate the creep and swelling behavior of a cladding.
    Type: Application
    Filed: January 26, 2015
    Publication date: December 29, 2016
    Applicant: TERRAPOWER, LLC
    Inventors: Micah Hackett, Ryan Latta, Samuel J. Miller, Gary Povirk, Mark R. Werner, Cheng Xu
  • Patent number: 9491259
    Abstract: Techniques are disclosed for loading programs efficiently in a parallel computing system. In one embodiment, nodes of the parallel computing system receive a load description file which indicates, for each program of a multiple program multiple data (MPMD) job, nodes which are to load the program. The nodes determine, using collective operations, a total number of programs to load and a number of programs to load in parallel. The nodes further generate a class route for each program to be loaded in parallel, where the class route generated for a particular program includes only those nodes on which the program needs to be loaded. For each class route, a node is selected using a collective operation to be a load leader which accesses a file system to load the program associated with a class route and broadcasts the program via the class route to other nodes which require the program.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: November 8, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael E. Aho, John E. Attinella, Thomas M. Gooding, Samuel J. Miller
  • Publication number: 20160011996
    Abstract: A Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaflop-scale includes node architectures based upon System-On-a-Chip technology, where each processing node comprises a single Application Specific Integrated Circuit (ASIC). The ASIC nodes are interconnected by a five dimensional torus network that optimally maximize the throughput of packet communications between nodes and minimize latency. The network implements collective network and a global asynchronous network that provides global barrier and notification functions. Integrated in the node design include a list-based prefetcher. The memory system implements transaction memory, thread level speculation, and multiversioning cache that improves soft error rate at the same time and supports DMA functionality allowing for parallel processing message-passing.
    Type: Application
    Filed: April 30, 2015
    Publication date: January 14, 2016
    Inventors: Sameh Asaad, Ralph E. Bellofatto, Michael A. Blocksome, Matthias A. Blumrich, Peter Boyle, Jose R. Brunheroto, Dong Chen, Chen-Yong Cher, George L. Chiu, Norman Christ, Paul W. Coteus, Kristan D. Davis, Gabor J. Dozsa, Alexandre E. Eichenberger, Noel A. Eisley, Matthew R. Ellavsky, Kahn C. Evans, Bruce M. Fleischer, Thomas W. Fox, Alan Gara, Mark E. Giampapa, Thomas M. Gooding, Michael K. Gschwind, John A. Gunnels, Shawn A. Hall, Rudolf A. Haring, Philip Heidelberger, Todd A. Inglett, Brant L. Knudson, Gerard V. Kopcsay, Sameer Kumar, Amith R. Mamidala, James A. Marcella, Mark G. Megerian, Douglas R. Miller, Samuel J. Miller, Adam J. Muff, Michael B. Mundy, John K. O'Brien, Kathryn M. O'Brien, Martin Ohmacht, Jeffrey J. Parker, Ruth J. Poole, Joseph D. Ratterman, Valentina Salapura, David L. Satterfield, Robert M. Senger, Burkhard Steinmacher-Burow, William M. Stockdell, Craig B. Stunkel, Krishnan Sugavanam, Yutaka Sugawara, Todd E. Takken, Barry M. Trager, James L. Van Oosten, Charles D. Wait, Robert E. Walkup, Alfred T. Watson, Robert W. Wisniewski, Peng Wu
  • Patent number: 9229782
    Abstract: Collectively loading an application in a parallel computer, the parallel computer comprising a plurality of compute nodes, including: identifying, by a parallel computer control system, a subset of compute nodes in the parallel computer to execute a job; selecting, by the parallel computer control system, one of the subset of compute nodes in the parallel computer as a job leader compute node; retrieving, by the job leader compute node from computer memory, an application for executing the job; and broadcasting, by the job leader to the subset of compute nodes in the parallel computer, the application for executing the job.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: January 5, 2016
    Assignee: International Business Machines Corporation
    Inventors: Michael E. Aho, John E. Attinella, Thomas M. Gooding, Samuel J. Miller, Michael B. Mundy
  • Patent number: 9081501
    Abstract: A Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaOPS-scale computing, at decreased cost, power and footprint, and that allows for a maximum packaging density of processing nodes from an interconnect point of view. The Supercomputer exploits technological advances in VLSI that enables a computing model where many processors can be integrated into a single Application Specific Integrated Circuit (ASIC).
    Type: Grant
    Filed: January 10, 2011
    Date of Patent: July 14, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sameh Asaad, Ralph E. Bellofatto, Michael A. Blocksome, Matthias A. Blumrich, Peter Boyle, Jose R. Brunheroto, Dong Chen, Chen-Yong Cher, George L. Chiu, Norman Christ, Paul W. Coteus, Kristan D. Davis, Gabor J. Dozsa, Alexandre E. Eichenberger, Noel A. Eisley, Matthew R. Ellavsky, Kahn C. Evans, Bruce M. Fleischer, Thomas W. Fox, Alan Gara, Mark E. Giampapa, Thomas M. Gooding, Michael K. Gschwind, John A. Gunnels, Shawn A. Hall, Rudolf A. Haring, Philip Heidelberger, Todd A. Inglett, Brant L. Knudson, Gerard V. Kopcsay, Sameer Kumar, Amith R. Mamidala, James A. Marcella, Mark G. Megerian, Douglas R. Miller, Samuel J. Miller, Adam J. Muff, Michael B. Mundy, John K. O'Brien, Kathryn M. O'Brien, Martin Ohmacht, Jeffrey J. Parker, Ruth J. Poole, Joseph D. Ratterman, Valentina Salapura, David L. Satterfield, Robert M. Senger, Brian Smith, Burkhard Steinmacher-Burow, William M. Stockdell, Craig B. Stunkel, Krishnan Sugavanam, Yutaka Sugawara, Todd E. Takken, Barry M. Trager, James L. Van Oosten, Charles D. Wait, Robert E. Walkup, Alfred T. Watson, Robert W. Wisniewski, Peng Wu
  • Patent number: 8918624
    Abstract: A method, computer program product and computer system for scaling and managing requests on a massively parallel machine, such as one running in MIMD mode on a SIMD machine. A submit mux (multiplexer) is used to federate work requests and to forward the requests to the management node. A resource arbiter receives and manges these work requests. A MIMD job controller works with the resource arbiter to manage the work requests on the SIMD partition. The SIMD partition may utilize a mux of its own to federate the work requests and the computer nodes. Instructions are also provided to control and monitor the work requests.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: December 23, 2014
    Assignee: International Business Machines Corporation
    Inventors: Paul V. Allen, Thomas A. Budnik, Mark G. Megerian, Samuel J. Miller
  • Publication number: 20140282599
    Abstract: Techniques are disclosed for loading programs efficiently in a parallel computing system. In one embodiment, nodes of the parallel computing system receive a load description file which indicates, for each program of a multiple program multiple data (MPMD) job, nodes which are to load the program. The nodes determine, using collective operations, a total number of programs to load and a number of programs to load in parallel. The nodes further generate a class route for each program to be loaded in parallel, where the class route generated for a particular program includes only those nodes on which the program needs to be loaded. For each class route, a node is selected using a collective operation to be a load leader which accesses a file system to load the program associated with a class route and broadcasts the program via the class route to other nodes which require the program.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: International Business Machines Corporation
    Inventors: Michael E. AHO, John E. ATTINELLA, Thomas M. GOODING, Samuel J. MILLER