Abstract: There is described an integrated antenna for radiating an electromagnetic beam at a wavelength ?, for example, in a range of millimeter and submillimeter waves. The antenna is integrated in a dielectric die having specific dimensions, and is configured as a dense array comprising two or more radiating elements (transmitters). The proposed array is denser than a conventional 1D or 2D array, would such a conventional array be arranged on the same dielectric die with a spacing ?/2 between its neighbouring radiating elements.

Abstract: A power amplifier with improved stability, gain, flatness and return loss and reduced the size, which comprises a two-stage power amplifier in balanced cascode topology that consists of a first common-source stage feeding into a first common-gate stage; a second common-source stage feeding into a second common-gate stage; an input matching network for matching the input impedance of the a two-stage power amplifier to a desired signal source impedance; an output matching network for matching the output impedance of the a two-stage power amplifier to a desired load; a first positive feedback path between the gate of the first common-source stage and the drain of the second common-gate (CG) stage and a second positive feedback path between the gate of the second common-source stage and the drain of the first common-gate (CG) stage; a first negative feedback path between the drain of the first common-gate (CG) stage and the gate of the first common-source stage and a second negative feedback path between the drai

Abstract: A method for improving the stability and reducing phase variations of an ultra-wideband attenuator, with respect to temperature variations, comprising the steps of providing an attenuator implemented in ?-topology and consisting of a serial path between the input and the output of the attenuator, including a first serial resistor Rs1 connected to the input, followed by a serial inductor Ls, followed by a second serial resistor Rs2 connected to the output; a first transistor T1 bridging between the input and the output, for controlling the impedance of the serial path by a first control input provided to the first transistor T1; a first parallel path between the input and ground, including a first parallel transistor T2a followed by first parallel resistor Rp1; a second parallel path between the output and ground, including a second parallel transistor T2b followed by second parallel resistor Rp2; a second control input commonly provided to first parallel transistor T2a and to the second parallel transistor T2

Abstract: An Integrated Circuit (IC) containing at least one printed transformer-based matching network, which comprises: a) at least one printed transformer-based matching network with reduced size, which comprises a printed transformer with multiple internal ports in the form of electromagnetic discontinuities, introduced along the transverse dimension of the printed transformer; reactive elements, added to of the internal ports to thereby increase the order of the transformer-based matching network, the one or more reactive elements are printed along the transverse dimension of the matching network; a printed component connected to the input port of the matching network; a printed component connected to the output port of the matching network.

Abstract: There is described an integrated antenna for radiating an electromagnetic beam at a wavelength ?, for example, in a range of millimeter and submillimeter waves. The antenna is integrated in a dielectric die having specific dimensions, and is configured as a dense array comprising two or more radiating elements (transmitters). The proposed array is denser than a conventional 1D or 2D array, would such a conventional array be arranged on the same dielectric die with a spacing ?/2 between its neighbouring radiating elements.

Abstract: Technique for improving efficiency of on-chip antennas, comprising placing each antenna on an individual area on the chip, defined by channels provided in the chip before or after placing the antenna(s). The channels may be metallized. Frequency of a radiating antenna element may be locked by wireless injection locking using a locked subharmonic frequency.

Abstract: Technique for improving efficiency of on-chip antennas, comprising placing each antenna on an individual area on the chip, defined by channels provided in the chip before or after placing the antenna(s). The channels may be metallized. Frequency of a radiating antenna element may be locked by wireless injection locking using a locked subharmonic frequency.