Abstract: A mechanism is provided for programmatic implicit multithreading. A first operation is executed on a first thread in a processor, where the first operation is from a set of operations within a block of code of an application that are distinct and process unrelated data. A determination is made as to whether a time limit associated with executing the first operation has been exceeded. Responsive to the time limit being exceeded, a determination is made as to whether there is one or more unexecuted operations in the set of operations. Responsive to one or more unexecuted operations existing in the set of operations, a new thread is spawned off on the processor to execute a next unexecuted operation of the one or more unexecuted operations.

Abstract: A data storage system includes first and second storage devices accessed via first and second hardware channels, respectively. A storage controller receives a first access request requesting access to first data and a second access request requesting access to second data, where both the first data and the second data are accessed via the first hardware channel. In response to detecting receipt of the first and second access requests within a same service window defining a range of temporal proximity, the storage controller records an association of identifiers of the first data and second data requested by the first and second access requests, respectively. The storage controller thereafter migrates the second data accessed by the second access request from the first storage device to the second storage device based on the recorded association, such that the first and second data are available for access via different hardware channels.

Abstract: A data storage system includes first and second storage devices accessed via first and second hardware channels, respectively. A storage controller receives a first access request requesting access to first data and a second access request requesting access to second data, where both the first data and the second data are accessed via the first hardware channel. In response to detecting receipt of the first and second access requests within a same service window defining a range of temporal proximity, the storage controller records an association of identifiers of the first data and second data requested by the first and second access requests, respectively. The storage controller thereafter migrates the second data accessed by the second access request from the first storage device to the second storage device based on the recorded association, such that the first and second data are available for access via different hardware channels.

Abstract: A mechanism is provided for programmatic implicit multithreading. A first operation is executed on a first thread in a processor, where the first operation is from a set of operations within a block of code of an application that are distinct and process unrelated data. A determination is made as to whether a time limit associated with executing the first operation has been exceeded. Responsive to the time limit being exceeded, a determination is made as to whether there is one or more unexecuted operations in the set of operations. Responsive to one or more unexecuted operations existing in the set of operations, a new thread is spawned off on the processor to execute a next unexecuted operation of the one or more unexecuted operations.

Abstract: A mechanism is provided for programmatic implicit multithreading. A first operation is executed on a first thread in a processor, where the first operation is from a set of operations within a block of code of an application that are distinct and process unrelated data. A determination is made as to whether a time limit associated with executing the first operation has been exceeded. Responsive to the time limit being exceeded, a determination is made as to whether there is one or more unexecuted operations in the set of operations. Responsive to one or more unexecuted operations existing in the set of operations, a new thread is spawned off on the processor to execute a next unexecuted operation of the one or more unexecuted operations.

Abstract: An amplification number may be input into a storage subsystem interface. A processor in a storage system may receive an original input/output (I/O) request from an application. The processor may determine, in response to the amplification number being input, to duplicate the original I/O request one or more times. The processor may generate one or more duplicate I/O requests of the original I/O request. The processor may store the original I/O request in a general address space in the storage subsystem. The processor may store the one or more duplicate I/O requests in a reserved address space in the storage subsystem. The processor may execute the original I/O request and the one or more duplicate requests.

Abstract: An amplification number may be input into a storage subsystem interface. A processor in a storage system may receive an original input/output (I/O) request from an application. The processor may determine, in response to the amplification number being input, to duplicate the original I/O request one or more times. The processor may generate one or more duplicate I/O requests of the original I/O request. The processor may store the original I/O request in a general address space in the storage subsystem. The processor may store the one or more duplicate I/O requests in a reserved address space in the storage subsystem. The processor may execute the original I/O request and the one or more duplicate requests.

Abstract: An amplification number may be input into a storage subsystem interface. A processor in a storage system may receive an original input/output (I/O) request from an application. The processor may determine, in response to the amplification number being input, to duplicate the original I/O request one or more times. The processor may generate one or more duplicate I/O requests of the original I/O request. The processor may store the original I/O request in a general address space in the storage subsystem. The processor may store the one or more duplicate I/O requests in a reserved address space in the storage subsystem. The processor may execute the original I/O request and the one or more duplicate requests.

Abstract: A mechanism is provided for programmatic implicit multithreading. A first operation is executed on a first thread in a processor, where the first operation is from a set of operations within a block of code of an application that are distinct and process unrelated data. A determination is made as to whether a time limit associated with executing the first operation has been exceeded. Responsive to the time limit being exceeded, a determination is made as to whether there is one or more unexecuted operations in the set of operations. Responsive to one or more unexecuted operations existing in the set of operations, a new thread is spawned off on the processor to execute a next unexecuted operation of the one or more unexecuted operations.

Abstract: An apparatus for collecting geophysical information may include a geophysical information station disposed along a seismic communication cable. A bypass circuit responsive to a command signal is in communication with a switching circuit that is operable to route electrical power, commands, data or a combination to bypass the geophysical information station in response to the command signal. An exemplary method for bypassing a geophysical information station in a geophysical information collection system includes sending a command signal to a bypass circuit and activating one or more switching circuits using the bypass circuit to route electrical power, commands, data or a combination to bypass the geophysical information station in response to the command signal.

Abstract: A computer processor determines an over-provisioning ratio and a host write pattern. The computer processor determines a write amplification target based on the host write pattern and the over-provisioning ratio. The computer processor determines a staleness threshold, wherein the staleness threshold corresponds to a ratio of valid pages of a block to total pages of the block. The computer processor erases a first block having a staleness which exceeds the staleness threshold.

Abstract: A computer processor determines an over-provisioning ratio and a host write pattern. The computer processor determines a write amplification target based on the host write pattern and the over-provisioning ratio. The computer processor determines a staleness threshold, wherein the staleness threshold corresponds to a ratio of valid pages of a block to total pages of the block. The computer processor erases a first block having a staleness which exceeds the staleness threshold.

Abstract: An apparatus for collecting geophysical information may include a geophysical information station disposed along a seismic communication cable. A bypass circuit responsive to a command signal is in communication with a switching circuit that is operable to route electrical power, commands, data or a combination to bypass the geophysical information station in response to the command signal. An exemplary method for bypassing a geophysical information station in a geophysical information collection system includes sending a command signal to a bypass circuit and activating one or more switching circuits using the bypass circuit to route electrical power, commands, data or a combination to bypass the geophysical information station in response to the command signal.

Abstract: An apparatus for collecting geophysical information may include a geophysical information station disposed along a seismic communication cable. A bypass circuit responsive to a command signal is in communication with a switching circuit that is operable to route electrical power, commands, data or a combination to bypass the geophysical information station in response to the command signal. An exemplary method for bypassing a geophysical information station in a geophysical information collection system includes sending a command signal to a bypass circuit and activating one or more switching circuits using the bypass circuit to route electrical power, commands, data or a combination to bypass the geophysical information station in response to the command signal.

Abstract: An apparatus for collecting geophysical information may include a geophysical information station disposed along a seismic communication cable. A bypass circuit responsive to a command signal is in communication with a switching circuit that is operable to route electrical power, commands, data or a combination to bypass the geophysical information station in response to the command signal. An exemplary method for bypassing a geophysical information station in a geophysical information collection system includes sending a command signal to a bypass circuit and activating one or more switching circuits using the bypass circuit to route electrical power, commands, data or a combination to bypass the geophysical information station in response to the command signal.

Abstract: Systems and methods for teaching a location in a device programming apparatus. The X, Y, Z and angle coordinates of a pick and place nozzle are initialized, and the nozzle is moved in the X and Y coordinates to a position above the device in the location to be taught. The new X and Y coordinates of the nozzle are stored to a memory along with the initial angle coordinate. The system automatically determines the Z location of the surface of the device. The nozzle then automatically picks up the device and performs vision centering to determine the X, Y and angle offsets with respect to the initialized coordinates. The X, Y and angle offsets are used to modify the stored X, Y and angle coordinates so as to precisely determine the X and Y location of the device center as well as the device angle with respect to the system's global reference frame.