Patents by Inventor SAN SONG

SAN SONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240121809
    Abstract: A method of a first terminal may include: identifying first RB set(s) to be used for SL communication among consecutive RB sets through an LBT procedure; identifying a first subchannel group included in the first RB set(s) and a second subchannel group including a first PRB in the first RB set(s), the first PRB being not included in the first subchannel group; configuring the first PRB within the second subchannel group as an SL communication resource; and transmitting, to a second terminal, control information indicating that the first PRB is configured as the SL communication resource.
    Type: Application
    Filed: September 27, 2023
    Publication date: April 11, 2024
    Inventors: Jun Hyeong KIM, Go San NOH, Il Gyu KIM, Man Ho PARK, Nak Woon SUNG, Jae Su SONG, Nam Suk LEE, Hee Sang CHUNG, Min Suk CHOI
  • Patent number: 9606864
    Abstract: A nonvolatile memory device includes a memory cell array including a selected page including multiple error correction code (ECC) units, and a voltage generation unit configured to generate a read voltage to read data from the selected page. Read voltage levels are set individually for the respective ECC units according to data detection results for each of the ECC units. During a read retry section performed with respect to selected ECC units of the selected page for which read errors have been detected, a re-read operation of the selected ECC units is performed according to the respective read voltage levels set for the selected ECC units.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: March 28, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Yeon Lee, Hee-Woong Kang, Jong-Nam Baek, San Song
  • Publication number: 20140101519
    Abstract: A nonvolatile memory device comprises a memory cell array comprising a selected page comprising multiple error correction code (ECC) units, and a voltage generation unit configured to generate a read voltage to read data from the selected page. Read voltage levels are set individually for the respective ECC units according to data detection results for each of the ECC units. During a read retry section performed with respect to selected ECC units of the selected page for which read errors have been detected, a re-read operation of the selected ECC units is performed according to the respective read voltage levels set for the selected ECC units.
    Type: Application
    Filed: July 22, 2013
    Publication date: April 10, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: SEUNG-YEON LEE, HEE-WOONG KANG, JONG-NAM BAEK, SAN SONG