Abstract: Certain aspects of the present disclosure provide a circuit for dividing or combining power. The circuit generally includes a Wilkinson power divider, a first capacitive element, and a first resistive element coupled in parallel with the first capacitive element, wherein the first capacitive element and the first resistive element are coupled between a first port of the circuit and a first port of the Wilkinson power divider.

Abstract: Certain aspects of the present disclosure provide a circuit for dividing or combining power. The circuit generally includes a Wilkinson power divider, a first capacitive element, and a first resistive element coupled in parallel with the first capacitive element, wherein the first capacitive element and the first resistive element are coupled between a first port of the circuit and a first port of the Wilkinson power divider.

Abstract: Methods and systems to broadcast sensor outputs in an automotive environment allow sensors such as cameras to output relatively unprocessed (raw) data to two or more different processing circuits where the processing circuits are located in separate and distinct embedded control units (ECUs). A first one of the two or more different processing circuits processes the raw data for human consumption. A second one of the two or more different processing circuits processes the raw data for machine utilization such as for autonomous driving functions. Such an arrangement allows for greater flexibility in utilization of the data from the sensors without imposing undue latency in the processing stream and without compromising key performance indices for human use and machine use.

Abstract: An electronic device comprises an electronic component and an integrated circuit, wherein the integrated circuit is configured to generate a system clock and an external clock having a programmable delay from the system clock, provide the external clock to the electronic component, determine a delay range between system clock and the external clock in which the integrated circuit and the electronic component can communicate, and program the external clock with one of a plurality of predetermined delay values based on the delay range.

Abstract: A method and apparatus for generating an arbitrary current waveform for use in characterizing power supply impedance for power delivery networks are provided. The method begins by providing an arbitrary waveform as an input to a test circuit. The current and voltage at an output of a device under test in then examined A frequency is then swept through a pre-determined range; and the frequency of the arbitrary voltage waveform is changed to match a predetermined frequency and impedance point.

Abstract: This disclosure describes a clock circuit for a memory controller. The described circuit uses a processor clock signal to generate an input clock signal for use during write operations to the memory, or to generate a feedback clock signal for use during read operations from the memory. The circuit is particularly applicable to mobile wireless devices that include memories that do not generate a strobe. The clock circuit may comprise a driver in series with a resistor element that generates an input clock signal for input to a memory, and a resistor-capacitor (RC) filter in series with a receiver that generates a feedback clock signal for output from the memory, wherein an input to the RC filter is tapped between the driver and the resistor element.

Abstract: An electronic device comprises an electronic component and an integrated circuit, wherein the integrated circuit is configured to generate a system clock and an external clock having a programmable delay from the system clock, provide the external clock to the electronic component, determine a delay range between system clock and the external clock in which the integrated circuit and the electronic component can communicate, and program the external clock with one of a plurality of predetermined delay values based on the delay range.

Abstract: This disclosure describes a clock circuit for a memory controller. The described circuit uses a processor clock signal to generate an input clock signal for use during write operations to the memory, or to generate a feedback clock signal for use during read operations from the memory. The circuit is particularly applicable to mobile wireless devices that include memories that do not generate a strobe. The clock circuit may comprise a driver in series with a resistor element that generates an input clock signal for input to a memory, and a resistor-capacitor (RC) filter in series with a receiver that generates a feedback clock signal for output from the memory, wherein an input to the RC filter is tapped between the driver and the resistor element.

Abstract: Systems and techniques are disclosed relating to adapting the frequency of an electronic device comprising an integrated circuit and an electronic component to improve performance. The integrated circuit determines a set of frequency plans, each corresponding to a distribution of delay range highest passing values and one of a set of frequencies at which the electronic device can operate. Based on communication with the electronic component, the integrated circuit implements a preferred frequency plan.

Abstract: Systems and techniques are disclosed relating to calibrating an integrated circuit to an electronic component. The systems and techniques include an integrated circuit configured to generate a system clock and an external clock having a programmable delay from the system clock. The integrated circuit may also be configured to provide the external clock to the electronic component to support communications therewith, communicate with the electronic component, and calibrate the external clock delay as a function of the communications.