Patents by Inventor Sandeep Razdan

Sandeep Razdan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11831093
    Abstract: An apparatus includes a substrate, a frame, and a socket. The frame defines a slot. The frame is coupled to the substrate such that the slot is aligned with an attachment location on the substrate. The socket receives a first device. The socket aligns with the attachment location on the substrate when the socket is inserted in the slot.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: November 28, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Matthew J. Traverso, Sandeep Razdan, Joyce J. M. Peternel
  • Patent number: 11784175
    Abstract: An optoelectronic assembly and methods of fabrication thereof are provided. The assembly includes a mold compound; a photonic integrated circuit (PIC) embedded in the mold compound, that has a face exposed from the mold compound in a first plane; an interposer embedded in the mold compound, that has a face exposed from the mold compound in the first plane (i.e., co-planar with the exposed face of the PIC); and an electrical integrated circuit (EIC) coupled to the exposed face of the PIC and the exposed face of the interposer, that establishes bridging electrical connections between the PIC and the interposer.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: October 10, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Matthew J. Traverso, Sandeep Razdan, Ashley J. Maker
  • Patent number: 11762155
    Abstract: Embodiments herein describe an optical system that includes a photonic integrated circuit (PIC) bonded to a package containing an electrical integrated circuit (EIC). However, this bond can prevent an edge coupler from optically aligning an optical fiber to an edge of the PIC in order to transfer optical signals. To provide room for the edge coupler, the PIC is arranged to overhang the package containing the EIC so that the package does not interfere with the ability of the edge coupler to align with the side or edge of the PIC. In this manner, an optical fiber can be optically aligned (e.g., butt coupled) to the edge of the PIC rather than having to use a grating coupler or some other less efficient optical coupling in order to transfer optical signals between the PIC and the optical fiber.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: September 19, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar K. Patel, Matthew J. Traverso, Sandeep Razdan, Aparna R. Prasad
  • Patent number: 11756861
    Abstract: An opto-electronic package is described. The opto-electronic package is manufactured using a fan out wafer level packaging to produce dies/frames which include connection features. Additional structures such as heat exchanged structures are joined to a connection component and affixed to packages, using the connection features, to provide structural support and heat exchange to heat generating components in the package, among other functions.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: September 12, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Ashley J. M. Erickson, Matthew J. Traverso, Sandeep Razdan, Joyce J. M. Peternel, Aparna R. Prasad
  • Publication number: 20230060862
    Abstract: Embodiments herein describe an optical system that includes a photonic integrated circuit (PIC) bonded to a package containing an electrical integrated circuit (EIC). However, this bond can prevent an edge coupler from optically aligning an optical fiber to an edge of the PIC in order to transfer optical signals. To provide room for the edge coupler, the PIC is arranged to overhang the package containing the EIC so that the package does not interfere with the ability of the edge coupler to align with the side or edge of the PIC. In this manner, an optical fiber can be optically aligned (e.g., butt coupled) to the edge of the PIC rather than having to use a grating coupler or some other less efficient optical coupling in order to transfer optical signals between the PIC and the optical fiber.
    Type: Application
    Filed: August 25, 2021
    Publication date: March 2, 2023
    Inventors: Vipulkumar K. PATEL, Matthew J. TRAVERSO, Sandeep RAZDAN, Aparna R. PRASAD
  • Publication number: 20220320765
    Abstract: An apparatus includes a substrate, a frame, and a socket. The frame defines a slot. The frame is coupled to the substrate such that the slot is aligned with an attachment location on the substrate. The socket receives a first device. The socket aligns with the attachment location on the substrate when the socket is inserted in the slot.
    Type: Application
    Filed: December 20, 2021
    Publication date: October 6, 2022
    Inventors: Matthew J. TRAVERSO, Sandeep RAZDAN, Joyce J. M. PETERNEL
  • Publication number: 20220278022
    Abstract: An opto-electronic package is described. The opto-electronic package is manufactured using a fan out wafer level packaging to produce dies/frames which include connection features. Additional structures such as heat exchanged structures are joined to a connection component and affixed to packages, using the connection features, to provide structural support and heat exchange to heat generating components in the package, among other functions.
    Type: Application
    Filed: May 12, 2022
    Publication date: September 1, 2022
    Inventors: Ashley J.M. ERICKSON, Matthew J. TRAVERSO, Sandeep RAZDAN, Joyce J. M. PETERNEL, Aparna R. PRASAD
  • Patent number: 11391888
    Abstract: Aspects described herein include a method comprising bonding a photonic wafer with an electronic wafer to form a wafer assembly, removing a substrate of the wafer assembly to expose a surface of the photonic wafer or of the electronic wafer, forming electrical connections between metal layers of the photonic wafer and metal layers of the electronic wafer, and adding an interposer wafer to the wafer assembly by bonding the interposer wafer with the wafer assembly at the exposed surface. The interposer wafer comprises through-vias that are electrically coupled with the metal layers of one or both of the photonic wafer and the electronic wafer. The method further comprises dicing the wafer assembly to form a plurality of dies. A respective edge coupler of each die is optically exposed at an interface formed by the dicing.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: July 19, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Sandeep Razdan, Vipulkumar K. Patel, Mark A. Webster, Matthew J. Traverso
  • Patent number: 11373930
    Abstract: An opto-electronic package is described. The opto-electronic package is manufactured using a fan out wafer level packaging to produce dies/frames which include connection features. Additional structures such as heat exchanged structures are joined to a connection component and affixed to packages, using the connection features, to provide structural support and heat exchange to heat generating components in the package, among other functions.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: June 28, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Ashley J. M. Erickson, Matthew J. Traverso, Sandeep Razdan, Joyce J. M. Peternel, Aparna R. Prasad
  • Patent number: 11226450
    Abstract: The present disclosure provides for periscope optical assemblies within interposers that include a bulk material having a first side and a second side opposite to the first side; a first optic defined in the bulk material at a first height in the bulk material along an axis extending between the first second sides; a second optic defined in the bulk material at a second height in the bulk material, different than the first height, along the axis; a first waveguide defined in the bulk material, extending from the first side to the first optic; a second waveguide defined in the bulk material, extending from the second optic to the second side; and a third waveguide defined in the bulk material, extending from the first optic to the second optic.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: January 18, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Matthew J. Traverso, Ashley J. Maker, Sandeep Razdan
  • Patent number: 11215775
    Abstract: An optical connection assembly joining optical components is described. The optical connection assembly is manufactured using a fan out wafer level packaging to produce dies/frames which include mechanical connection features. A fastener is joined to a connection component and affixed to the mechanical connection features, to provide structural support to the connection between the connected component and the die/frame structure.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: January 4, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Ashley J. Maker, Joyce J. M. Peternel, Sandeep Razdan, Matthew J. Traverso, Aparna R. Prasad
  • Patent number: 11181689
    Abstract: Photonic devices include a photonic assembly and a substrate coupled to the photonic assembly. The photonic assembly includes a photonic die and an optical device coupled to the photonic die with an adhesive to form an optical connection between the optical device and the photonic die. The photonic assembly is coupled to the photonic assembly by reflowing a plurality of solder connections at temperature that is less than a cure temperature of the adhesive.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: November 23, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Sandeep Razdan, Vipulkumar K. Patel, Aparna R. Prasad
  • Publication number: 20210305128
    Abstract: An opto-electronic package is described. The opto-electronic package is manufactured using a fan out wafer level packaging to produce dies/frames which include connection features. Additional structures such as heat exchanged structures are joined to a connection component and affixed to packages, using the connection features, to provide structural support and heat exchange to heat generating components in the package, among other functions.
    Type: Application
    Filed: March 31, 2020
    Publication date: September 30, 2021
    Inventors: Ashley J.M. ERICKSON, Matthew J. TRAVERSO, Sandeep RAZDAN, Joyce J.M. PETERNEL, Aparna R. PRASAD
  • Publication number: 20210280568
    Abstract: An optoelectronic assembly and methods of fabrication thereof are provided. The assembly includes a mold compound; a photonic integrated circuit (PIC) embedded in the mold compound, that has a face exposed from the mold compound in a first plane; an interposer embedded in the mold compound, that has a face exposed from the mold compound in the first plane (i.e., co-planar with the exposed face of the PIC); and an electrical integrated circuit (EIC) coupled to the exposed face of the PIC and the exposed face of the interposer, that establishes bridging electrical connections between the PIC and the interposer.
    Type: Application
    Filed: May 13, 2021
    Publication date: September 9, 2021
    Inventors: Matthew J. TRAVERSO, Sandeep RAZDAN, Ashley J. MAKER
  • Patent number: 11043478
    Abstract: An optoelectronic assembly and methods of fabrication thereof are provided. The assembly includes a mold compound; a photonic integrated circuit (PIC) embedded in the mold compound, that has a face exposed from the mold compound in a first plane; an interposer embedded in the mold compound, that has a face exposed from the mold compound in the first plane (i.e., co-planar with the exposed face of the PIC); and an electrical integrated circuit (EIC) coupled to the exposed face of the PIC and the exposed face of the interposer, that establishes bridging electrical connections between the PIC and the interposer.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: June 22, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Matthew J. Traverso, Sandeep Razdan, Ashley J. Maker
  • Patent number: 11029475
    Abstract: The present disclosure provides a frame lid assembly, which may be used in assembling an optical platform to provide isolated thermal conduction paths for various elements thereof. The frame lid assembly includes a first frame lid, including: a foot, disposed in a first plane; a roof, disposed in a second plane parallel to the first plane, the roof defining a port as a first through-hole that is perpendicular to the second plane; a wall, disposed obliquely to the first plane, separating the roof from the foot, the wall defining a slot as a second through-hole that is parallel to the first plane; a second frame lid connected to the first frame lid and thermally isolated from the first frame lid, the second frame lid including: a cap, connected to the roof via a thermal insulator; and a plug, extending perpendicularly from the cap through the port.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: June 8, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar K. Patel, Aparna R. Prasad, Sandeep Razdan
  • Publication number: 20210141154
    Abstract: Aspects described herein include a method comprising bonding a photonic wafer with an electronic wafer to form a wafer assembly, removing a substrate of the wafer assembly to expose a surface of the photonic wafer or of the electronic wafer, forming electrical connections between metal layers of the photonic wafer and metal layers of the electronic wafer, and adding an interposer wafer to the wafer assembly by bonding the interposer wafer with the wafer assembly at the exposed surface. The interposer wafer comprises through-vias that are electrically coupled with the metal layers of one or both of the photonic wafer and the electronic wafer. The method further comprises dicing the wafer assembly to form a plurality of dies. A respective edge coupler of each die is optically exposed at an interface formed by the dicing.
    Type: Application
    Filed: November 7, 2019
    Publication date: May 13, 2021
    Inventors: Sandeep RAZDAN, Vipulkumar K. PATEL, Mark A. WEBSTER, Matthew J. TRAVERSO
  • Patent number: 10962719
    Abstract: Using laser patterning for an optical assembly, optical features are written into photonic elements at the end of a manufacturing sequence in order to prevent errors and damages to the optical features. The optical assembly is manufactured by affixing a photonic element to a substrate which includes one or more optical features and mapping one or more optical features for the photonic element. The optical features are then written into the fixed photonic element using laser patterning and the optical assembly is completed by connecting components, such as optical fibers, to the photonic element.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: March 30, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Sandeep Razdan, Ashley J. Maker, Jock T. Bovington, Matthew J. Traverso
  • Publication number: 20210088722
    Abstract: Photonic devices include a photonic assembly and a substrate coupled to the photonic assembly. The photonic assembly includes a photonic die and an optical device coupled to the photonic die with an adhesive to form an optical connection between the optical device and the photonic die. The photonic assembly is coupled to the photonic assembly by reflowing a plurality of solder connections at temperature that is less than a cure temperature of the adhesive.
    Type: Application
    Filed: September 23, 2019
    Publication date: March 25, 2021
    Inventors: Sandeep RAZDAN, Vipulkumar K. PATEL, Aparna R. PRASAD
  • Publication number: 20210072461
    Abstract: The present disclosure provides for periscope optical assemblies within interposers that include a bulk material having a first side and a second side opposite to the first side; a first optic defined in the bulk material at a first height in the bulk material along an axis extending between the first second sides; a second optic defined in the bulk material at a second height in the bulk material, different than the first height, along the axis; a first waveguide defined in the bulk material, extending from the first side to the first optic; a second waveguide defined in the bulk material, extending from the second optic to the second side; and a third waveguide defined in the bulk material, extending from the first optic to the second optic.
    Type: Application
    Filed: November 24, 2020
    Publication date: March 11, 2021
    Inventors: Matthew J. TRAVERSO, Ashley J. MAKER, Sandeep RAZDAN