Abstract: System and method for improving displayed image quality of an electronic display that displays a first image frame by applying a first voltage to a display pixel and a second image frame directly before the first image frame by applying a second voltage to the display pixel. A display pipeline is communicatively coupled to the electronic display and receives first image data corresponding with the first image frame, where the image data includes a first grayscale value corresponding with the display pixel. Additionally the display pipeline determines an inversion balancing grayscale offset based at least in part on the first grayscale value when polarity of the first voltage and polarity of the second voltage are the same and determines magnitude of the first voltage by applying the inversion balancing grayscale offset to the first grayscale value to reduce likelihood of a perceivable luminance spike when displaying the first image frame.

Abstract: Methods and devices employing circuitry for dynamically adjusting bandwidth control of a display interface are provided. The display interface or image content is dynamically adjusted to support both high-speed image data (e.g., 120 Hz image data) and lower-speed content (e.g., 60 Hz content). For example, in some embodiments, additional pixel pipelines and/or processing lanes may be activated during the rendering of high-speed image data, but not during the rendering of low-speed image data. Additionally or alternatively, high-speed image data, but not low-speed data, may be compressed to render high-speed content over an interface that supports only low-speed content.

Abstract: Methods and devices for reducing the power consumption of a frame buffer and timing controller of an electronic display are provided. By way of example, a method of operating an electronic display includes receiving image data from a processor of the electronic display, storing the image data to a buffer of the electronic display, reading the image data from the buffer to supply the image data to a column driver of the electronic display, determining whether an amount of image data stored in buffer is less than a threshold, and switching from reading the image data from the buffer to reading the image data directly from the processor when the amount of image data stored in buffer is less than the threshold.

Abstract: A method for operating a gate driver that is driving pixel transistors of a display panel, is described. An internal start pulse is produced in response to an external start pulse and in accordance with a system clock, wherein the internal start pulse is input to a first cell of a gate driver shift register whose outputs are coupled to level shifting output stages that are driving the rows of pixel transistors of the display panel. The produced internal start pulse was qualified by an output of a last cell of the gate driver shift register. Other embodiments are also described and claimed.

Abstract: One embodiment of the present disclosure describes an electronic display. The electronic display includes a display driver that write image frames to pixels of the electronic display with a first refresh rate or a second refresh rate, in which the second refresh rate is less than the first refresh rate. Additionally, the electronic display includes a timing controller that receives image frames from an image source, in which one or more of the image frames are configured to be displayed on the display panel to play video content; determines a capture rate of the video content based at least in part on a cadence with which the image frames are received, in which the capture rate describes a rate at which each of the one or more image frames was captured by an image sensor; and instructs the display driver to write the one or more of the image frames at the second refresh when the second refresh rate is an integer multiple of the capture rate.

Abstract: Devices and methods for useful in providing localized synchronized and/or dynamic in-band internal gamma code adjustment per frame period are provided. By way of example, a display panel includes a data driver, which includes a first DAC configured to provide an internal gamma voltage signal to cause a first adjustment to an image data signal. The first adjustment is configured to selectively adjust the image data signal based at least in part on a refresh rate or a frame rate of the display panel. The data driver includes a second DAC coupled to the first DAC and configured to provide an external gamma voltage signal configured to provide a second adjustment to the image data signal, and an output buffer configured to supply the image data signal to pixels of the display panel, wherein the image data signal comprises the first adjustment and the second adjustment.

Abstract: An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.

Abstract: Methods and systems for compensating for VCOM variations include determining a voltage change in pixels between frames to be displayed on an electronic display. Based on the determined voltage change, VCOM variation is calculated based on coupling the VCOM to one or more data lines of the electronic display. VCOM compensation is determined and applied to offset for the VCOM variation. Using the VCOM offset, subsequent pixel content for the one or more pixels is written using the compensated VCOM.

Abstract: System and method for improving displayed image quality of an electronic display that displays a first image frame by applying a first voltage to a display pixel and a second image frame directly before the first image frame by applying a second voltage to the display pixel. A display pipeline is communicatively coupled to the electronic display and receives first image data corresponding with the first image frame, where the image data includes a first grayscale value corresponding with the display pixel. Additionally the display pipeline determines an inversion balancing grayscale offset based at least in part on the first grayscale value when polarity of the first voltage and polarity of the second voltage are the same and determines magnitude of the first voltage by applying the inversion balancing grayscale offset to the first grayscale value to reduce likelihood of a perceivable luminance spike when displaying the first image frame.

Abstract: Systems and methods are provided for improving displayed image quality of an electronic display with reduced power consumption. In some embodiments, a display pixel in the electronic display includes a pixel electrode and a common electrode. A pixel electrode driver electrically coupled to the first display pixel writes the display pixel by supplying a pixel voltage signal to the pixel electrode. A common electrode driver electrically coupled to the common electrode includes a power amplifier that supplies a common voltage signal to the common electrode to predictively offset net charge accumulation expected in the common electrode; a first power supply rail selectively connectable to the power amplifier based on a target voltage of the common voltage signal; and a second power supply rail selectively connectable to the power amplifier based on the target voltage, in which the first and second power supply rails supply different voltages when connected.

Abstract: This application relates to systems, methods, and apparatus for reducing the power consumption of a display panel. Specifically, the embodiments discussed herein relate to a panel pixel charge scheme that allows the current output of a display driver to be modified based on the content to be displayed at the display panel. The display driver can compare current and upcoming display content in order to determine how the line voltage for one or more output lines will change over time. If, based on the comparison, the voltage for an output line is not going to vary substantially over time, the bias current output from the display driver can be modified in order to save power. The modification to the bias current can depend on the amount of change the line voltage will undergo in subsequent executions of the content data.

Abstract: One embodiment describes an electronic display that displays image frames with a first refresh rate or a second refresh rate, in which the second refresh rate is lower than the first refresh rate; a display driver that writes the image frames by applying voltage to a display panel; and a timing controller that receives first image data from an image source, in which the first image data describes a first image frame and a first desired refresh rate equal to the second fresh rate; and that instructs the display driver to apply a first set of voltage polarities to the display panel to display first image frame at the first refresh rate and to apply a second set of voltage polarities to the display the first image frame at the second refresh rate when polarity of inversion imbalance accumulated is equal to polarity of the first set of voltage polarities.

Abstract: This application relates to systems, methods, and apparatus for optimizing the operations of a power converter of a display panel based on image data to be output by the display panel. The power converter can include one or more switches that can be activated or deactivated based on the image data in order to shift a power efficiency of the power converter. Power efficiency is shifted as a result of balancing an amount of charge necessary for a load with an amount of resistance created when activating switches of the power converter. Therefore, by dynamically altering a configuration of a power converter based on image data, power efficiency of the power converter can be improved.

Abstract: Systems, methods, and device are provided to provide inversion techniques for dynamic variable refresh rate electronic displays. One embodiment of the present disclosure describes An electronic display including a display panel that display images with varying refresh rates and a timing controller that receives image data from an image source, determines a counter value, and instructs a driver in the electronic display to apply a voltage to the display panel to write an image on the display panel, in which a negative voltage is applied when the counter value is positive and a positive voltage is applied when the counter value is less than or equal to zero. Additionally, the timing controller update the counter value based at least in part on duration the image is displayed on the display panel, wherein the counter value increases when the voltage is positive and decreases when the voltage is negative.

Abstract: Methods and systems for compensating for VCOM variations include determining a voltage change in pixels between frames to be displayed on an electronic display. Based on the determined voltage change, VCOM variation is calculated based on coupling the VCOM to one or more data lines of the electronic display. VCOM compensation is determined and applied to offset for the VCOM variation. Using the VCOM offset, subsequent pixel content for the one or more pixels is written using the compensated VCOM.

Abstract: Systems and methods are provided for improving displayed image quality of an electronic display that includes a display pixel. The electronic display displays a first image frame directly after a second image frame by applying an analog electrical signal to the display pixel. To facilitate display of the first image frame, circuitry receives image data corresponding to the image frame, in which the image data includes a grayscale value that indicates target luminance of the display pixel; determines expected refresh rate of the first image frame based at least in part on actual refresh rate of the second image frame; determines a pixel response correction offset based at least in part on the expected refresh rate of the first image frame; and determines processed image data by applying the pixel response correction offset to the grayscale value, in which the processed image data indicates magnitude of the analog electrical signal.

Abstract: Methods, systems, and devices for improving contrast, dynamic range, and power consumption of a backlight in a display are provided. By way of example, a method includes receiving image data to be displayed on pixels of a display panel, generating a global histogram of the image data, generating a plurality of thresholds based on the global histogram, and defining a first threshold and a second threshold of the plurality of thresholds as local thresholds based on the global histogram and a local histogram. The first threshold and the second threshold are generated according to a local tone mapping function. The method further includes adjusting a luminance of one or more of pixels of the display panel based at least in part on the first threshold and the second threshold.

Abstract: Systems and methods for controlling operation of an electronic display are provided. One embodiment describes an electronic display, which includes a display driver that writes image frames to pixels of the electronic display with a first refresh rate or a second refresh rate; and a timing controller that receives a plurality of image frames from an image source, in which the plurality of image frames are displayed on the electronic display to play video content; detects a cadence with which the plurality of image frames are received from the image source; and, based at least in part on the cadence of the plurality of image frames, instructs the display driver to write each of the plurality of image frames either as a single image frame at the first refresh rate or an image frame at the first refresh rate followed by a repeat of the image frame at the second refresh rate.

Abstract: One embodiment describes an electronic display. The electronic display includes display driver circuitry that displays at least a first image frame and a second image frame on the electronic device using a first display pixel and a second display pixel. The electronic display also includes touch sensing circuitry that detects user interaction with the electronic display. A timing controller of the electronic display determines at least a first insertion time for a first intra-frame pause for the first image frame and a second insertion time for a second intra-frame pause for the second image frame. The first and second intra-frame pauses are periods where the display driver circuitry is pauses rendering of image data to allow the touch sensing circuitry to detect user interaction. The insertion times for the first and second intra-frame pauses are varied from one another.

Abstract: A method for simplifying the host-to-display subsystem communications and consolidating the non-volatile memory requirements into a PMIC (power management integrated circuit) is disclosed. Hardware and software resource reduction in both the client devices (located in the display subsystem) and the host System on a Chip (SOC) can be realized with a novel PMIC design. The novel PMIC design achieves the resource reduction by providing for the following features: (1) Single-point communication, (2) Single-point notification, (3) Client device status storage, (4) Client device initialization from PMIC non-volatile memory, and (5) Subsystem calibration retrieval from PMIC non-volatile memory.