Patents by Inventor Sandro Herrera

Sandro Herrera has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10560061
    Abstract: A low capacitance n-channel analog switch circuit, a p-channel analog switch circuit, and a full CMOS transmission gate (T-gate) circuit are described. Resistive decoupling can be used to isolate the switch or T-gate from AC grounds. A semiconductor region that is separated from a body region of a pass field-effect transistor (FET), such as by an insulator, can be coupled to or driven to a voltage similar to the input voltage or other desired bias voltage (e.g., an operational amplifier output) to help reduce parasitic capacitance of the switch or T-gate. The switch or T-gate can help provide improved frequency bandwidth or frequency response. The switch can be useful in a programmable gain amplifier (PGA) or programmable gain instrumentation amplifier (PGIA) or other circuit in which excessive switch capacitance could degrade circuit performance.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: February 11, 2020
    Assignee: Analog Devices, Inc.
    Inventors: Sandro Herrera, Alan K Jeffery
  • Patent number: 10200029
    Abstract: A low capacitance n-channel analog switch circuit, a p-channel analog switch circuit, and a full CMOS transmission gate (T-gate) circuit are described. Resistive decoupling can be used to isolate the switch or T-gate from AC grounds, such as one or more switch control signal inputs or supply voltages. A semiconductor region that is separated from a body region of a pass field-effect transistor (FET) can be coupled to or driven to a voltage similar to the input voltage or other desired voltage to help reduce parasitic capacitance of the switch or T-gate. The switch or T-gate can have improved frequency bandwidth or frequency response. The switch can be useful in a programmable gain amplifier (PGA) or programmable gain instrumentation amplifier (PGIA) or other circuit in which excessive switch capacitance could degrade circuit performance.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: February 5, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Sandro Herrera, Alan K Jeffery
  • Patent number: 10141763
    Abstract: A soft start amplifier provides a soft-start function that controls a battery charging current in a feedback loop charging circuit by selecting the lowest voltage between a soft start voltage and an error derived control voltage. The lowest voltage is used as a control signal for controlling the battery charging current in the feedback loop charging circuit. The error voltage is a difference between a voltage proportional to the charging current and a voltage proportional to the target charging current while the soft start voltage is a voltage configured to ramp up with time. Using the lower voltage of the error voltage and the soft start voltage reduces the inrush current that may occur when the error derived control voltage spikes to the supply voltage in an attempt to correct the initial difference between the target charging current and a measured charging current.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: November 27, 2018
    Assignee: Analog Devices, Inc.
    Inventors: Sandro Herrera, Alan K Jeffery
  • Publication number: 20180069407
    Abstract: A soft start amplifier provides a soft-start function that controls a battery charging current in a feedback loop charging circuit by selecting the lowest voltage between a soft start voltage and an error derived control voltage. The lowest voltage is used as a control signal for controlling the battery charging current in the feedback loop charging circuit. The error voltage is a difference between a voltage proportional to the charging current and a voltage proportional to the target charging current while the soft start voltage is a voltage configured to ramp up with time. Using the lower voltage of the error voltage and the soft start voltage reduces the inrush current that may occur when the error derived control voltage spikes to the supply voltage in an attempt to correct the initial difference between the target charging current and a measured charging current.
    Type: Application
    Filed: September 7, 2016
    Publication date: March 8, 2018
    Inventors: Sandro Herrera, Alan K. Jeffery
  • Publication number: 20180062646
    Abstract: A low capacitance n-channel analog switch circuit, a p-channel analog switch circuit, and a full CMOS transmission gate (T-gate) circuit are described. Resistive decoupling can be used to isolate the switch or T-gate from AC grounds. A semiconductor region that is separated from a body region of a pass field-effect transistor (FET), such as by an insulator, can be coupled to or driven to a voltage similar to the input voltage or other desired bias voltage (e.g., an operational amplifier output) to help reduce parasitic capacitance of the switch or T-gate. The switch or T-gate can help provide improved frequency bandwidth or frequency response. The switch can be useful in a programmable gain amplifier (PGA) or programmable gain instrumentation amplifier (PGIA) or other circuit in which excessive switch capacitance could degrade circuit performance.
    Type: Application
    Filed: September 1, 2016
    Publication date: March 1, 2018
    Inventors: Sandro Herrera, Alan K. Jeffery
  • Publication number: 20180062644
    Abstract: A low capacitance n-channel analog switch circuit, a p-channel analog switch circuit, and a full CMOS transmission gate (T-gate) circuit are described. Resistive decoupling can be used to isolate the switch or T-gate from AC grounds, such as one or more switch control signal inputs or supply voltages. A semiconductor region that is separated from a body region of a pass field-effect transistor (FET) can be coupled to or driven to a voltage similar to the input voltage or other desired voltage to help reduce parasitic capacitance of the switch or T-gate. The switch or T-gate can have improved frequency bandwidth or frequency response. The switch can be useful in a programmable gain amplifier (PGA) or programmable gain instrumentation amplifier (PGIA) or other circuit in which excessive switch capacitance could degrade circuit performance.
    Type: Application
    Filed: September 1, 2016
    Publication date: March 1, 2018
    Inventors: Sandro Herrera, Alan K. Jeffery
  • Patent number: 9634482
    Abstract: Apparatus and methods for providing transient overstress protection with active feedback are disclosed. In certain configurations, a protection circuit includes a transient detection circuit, a bias circuit, a clamp circuit, and a sense feedback circuit that generates a positive feedback current when the clamp circuit is clamping. The transient detection circuit can detect a presence of a transient overstress event, and can generate a detection current in response to detection of the transient overstress event. The detection current and the positive feedback current can be combined to generate a combined current, and the bias circuit can turn on the clamp circuit in response to the combined current. While the transient overstress event is present and the clamp circuit is clamping, the sense feedback circuit can generate the positive feedback current to maintain the clamp circuit turned on for the event's duration.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: April 25, 2017
    Assignee: ANALOG DEVICES, INC.
    Inventors: Srivatsan Parthasarathy, Javier Alejandro Salcedo, Sandro Herrera
  • Patent number: 9473075
    Abstract: An amplifier system may include a current source, an impedance element responsive to a current change, and a feedback controller generating a control signal based on impedance element response. Current source may supply current to a pair of output elements, one of which being controlled by an integrator, and a portion of the integrator. Impedance element may have terminals coupled to inputs of the output elements and may be configured to experience a change in voltage based on a change in current supplied to its input. Feedback controller may have a pair of inputs coupled to the terminals of impedance element and an output to control the current source based on a detected change in voltage across the impedance element. Current source may be varied based on the control signal to maintain a constant current supplied to the input of the impedance elements.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: October 18, 2016
    Assignee: ANALOG DEVICES, INC.
    Inventor: Sandro Herrera
  • Publication number: 20160028355
    Abstract: An amplifier system may include a current source, an impedance element responsive to a current change, and a feedback controller generating a control signal based on impedance element response. Current source may supply current to a pair of output elements, one of which being controlled by an integrator, and a portion of the integrator. Impedance element may have terminals coupled to inputs of the output elements and may be configured to experience a change in voltage based on a change in current supplied to its input. Feedback controller may have a pair of inputs coupled to the terminals of impedance element and an output to control the current source based on a detected change in voltage across the impedance element. Current source may be varied based on the control signal to maintain a constant current supplied to the input of the impedance elements.
    Type: Application
    Filed: July 25, 2014
    Publication date: January 28, 2016
    Applicant: ANALOG DEVICES, INC.
    Inventor: Sandro HERRERA
  • Publication number: 20160020603
    Abstract: Apparatus and methods for providing transient overstress protection with active feedback are disclosed. In certain configurations, a protection circuit includes a transient detection circuit, a bias circuit, a clamp circuit, and a sense feedback circuit that generates a positive feedback current when the clamp circuit is clamping. The transient detection circuit can detect a presence of a transient overstress event, and can generate a detection current in response to detection of the transient overstress event. The detection current and the positive feedback current can be combined to generate a combined current, and the bias circuit can turn on the clamp circuit in response to the combined current. While the transient overstress event is present and the clamp circuit is clamping, the sense feedback circuit can generate the positive feedback current to maintain the clamp circuit turned on for the event's duration.
    Type: Application
    Filed: July 18, 2014
    Publication date: January 21, 2016
    Inventors: Srivatsan Parthasarathy, Javier Alejandro Salcedo, Sandro Herrera
  • Patent number: 8872549
    Abstract: A circuit includes multiple input sub-circuits coupled to a common output node. Each input sub-circuit includes a transconductance cell. A diode is coupled between the output of the transconductance cell and a common output node. A feedback circuit is coupled between the common output node and a second input of the transconductance cell. A voltage follower is coupled between the common output node and a reference voltage, with an input coupled to the output of the transconductance cell.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: October 28, 2014
    Assignee: Analog Devices, Inc.
    Inventors: Sandro Herrera, Moshe Gerstenhaber
  • Publication number: 20140232435
    Abstract: A circuit includes multiple input sub-circuits coupled to a common output node. Each input sub-circuit includes a transconductance cell. A diode is coupled between the output of the transconductance cell and a common output node. A feedback circuit is coupled between the common output node and a second input of the transconductance cell. A voltage follower is coupled between the common output node and a reference voltage, with an input coupled to the output of the transconductance cell.
    Type: Application
    Filed: February 19, 2013
    Publication date: August 21, 2014
    Applicant: Analog Devices, Inc.
    Inventors: Sandro HERRERA, Moshe GERSTENHABER
  • Publication number: 20140159813
    Abstract: A transconductance circuit that improves linearity and output current over a wider range of input voltages than prior designs. The transconductance circuit may include first and second sets of paired differential transistors. In each set, emitters of the paired transistors may be commonly coupled to corresponding nodes of a common impedance, and collectors may be coupled to output terminals of the transconductance circuit. The circuit may further include first and second sets of doublet differential transistor pairs, each doublet pair having transistors of different sizes. Each doublet pair may have current sources coupled between commonly coupled emitters and a source potential. Respective collectors for each doublet pair may be coupled to the output terminals of the transconductance circuit. A pair of voltage followers may be provided to replicate corresponding input voltages across corresponding bases of the differential transistor pairs and the doublet transistor pairs.
    Type: Application
    Filed: February 18, 2014
    Publication date: June 12, 2014
    Applicant: ANALOG DEVICES, INC.
    Inventor: Sandro HERRERA
  • Patent number: 8692615
    Abstract: A transconductance circuit that improves linearity and output current over a wider range of input voltages than prior designs. The transconductance circuit may include first and second sets of paired differential transistors. In each set, emitters of the paired transistors may be commonly coupled to corresponding nodes of a common impedance, and collectors may be coupled to output terminals of the transconductance circuit. The circuit may further include first and second sets of doublet differential transistor pairs, each doublet pair having transistors of different sizes. Each doublet pair may have current sources coupled between commonly coupled emitters and a source potential. Respective collectors for each doublet pair may be coupled to the output terminals of the transconductance circuit. A pair of voltage followers may be provided to replicate corresponding input voltages across corresponding bases of the differential transistor pairs and the doublet transistor pairs.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: April 8, 2014
    Assignee: Analog Devices, Inc.
    Inventor: Sandro Herrera
  • Publication number: 20130249632
    Abstract: A transconductance circuit that improves linearity and output current over a wider range of input voltages than prior designs. The transconductance circuit may include first and second sets of paired differential transistors. In each set, emitters of the paired transistors may be commonly coupled to corresponding nodes of a common impedance, and collectors may be coupled to output terminals of the transconductance circuit. The circuit may further include first and second sets of doublet differential transistor pairs, each doublet pair having transistors of different sizes. Each doublet pair may have current sources coupled between commonly coupled emitters and a source potential. Respective collectors for each doublet pair may be coupled to the output terminals of the transconductance circuit. A pair of voltage followers may be provided to replicate corresponding input voltages across corresponding bases of the differential transistor pairs and the doublet transistor pairs.
    Type: Application
    Filed: March 20, 2012
    Publication date: September 26, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventor: Sandro HERRERA
  • Patent number: 8536923
    Abstract: A system and method for reducing gain error and distortion in an operational amplifier due to errors in the second or integrator stage. A correction circuit may replicate an error current and insert the current into the signal stream to preempt the induction of an error at the amplifier's input. A capacitor may sample the error voltage at the input of the integrator stage of the amplifier and generate a replica of the error current in the integration capacitor to feed it into the input of the integrator stage. This eliminates any nonlinearity errors created by error currents in the compensation or integration capacitor at the second or integrator stage of the two-stage amplifier. Feeding the error current to the integrator stage may be facilitated with a unity gain buffer and a current mirror.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: September 17, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Moshe Gerstenhaber, Sandro Herrera, Chau Cuong Tran
  • Patent number: 8519794
    Abstract: A current mirror circuit provided in an emitter follower configuration achieves linearly output over a range of input currents by operating in response to a bias current that is a replica of the input current. The current mirror may include a pair of transistors and a pair of resistors, in which: a first resistor and a base of a first transistor are coupled to a first input terminal for a first input current, an emitter of the first transistor and a base of the second transistor are coupled to a second input terminal for a second input current, the first and second input currents being replicas of each other, an emitter of the second transistor being coupled to the second resistor, a collector of the second transistor being coupled to an output terminal of the current mirror, and a collector of the first transistor and the two resistors are coupled to a common node.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: August 27, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Sandro Herrera
  • Publication number: 20130169260
    Abstract: A current mirror circuit provided in an emitter follower configuration achieves linearly output over a range of input currents by operating in response to a bias current that is a replica of the input current. The current mirror may include a pair of transistors and a pair of resistors, in which: a first resistor and a base of a first transistor are coupled to a first input terminal for a first input current, an emitter of the first transistor and a base of the second transistor are coupled to a second input terminal for a second input current, the first and second input currents being replicas of each other, an emitter of the second transistor being coupled to the second resistor, a collector of the second transistor being coupled to an output terminal of the current mirror, and a collector of the first transistor and the two resistors are coupled to a common node.
    Type: Application
    Filed: February 25, 2013
    Publication date: July 4, 2013
    Applicant: Analog Devices, Inc.
    Inventor: Sandro Herrera
  • Patent number: 8405458
    Abstract: A current mirror circuit provided in an emitter follower configuration achieves linearly output over a range of input currents by operating in response to a bias current that is a replica of the input current. The current mirror may include a pair of transistors and a pair of resistors, in which: a first resistor and a base of a first transistor are coupled to a first input terminal for a first input current, an emitter of the first transistor and a base of the second transistor are coupled to a second input terminal for a second input current, the first and second input currents being replicas of each other, an emitter of the second transistor being coupled to the second resistor, a collector of the second transistor being coupled to an output terminal of the current mirror, and a collector of the first transistor and the two resistors are coupled to a common node.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: March 26, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Sandro Herrera
  • Publication number: 20130021098
    Abstract: A system and method for reducing gain error and distortion in an operational amplifier due to errors in the second or integrator stage. A correction circuit may replicate an error current and insert the current into the signal stream to preempt the induction of an error at the amplifier's input. A capacitor may sample the error voltage at the input of the integrator stage of the amplifier and generate a replica of the error current in the integration capacitor to feed it into the input of the integrator stage. This eliminates any nonlinearity errors created by error currents in the compensation or integration capacitor at the second or integrator stage of the two-stage amplifier. Feeding the error current to the integrator stage may be facilitated with a unity gain buffer and a current mirror.
    Type: Application
    Filed: July 21, 2011
    Publication date: January 24, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventors: Moshe GERSTENHABER, Sandro HERRERA, Chau Cuong TRAN