Patents by Inventor Sang-Hyuk Kwon

Sang-Hyuk Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110235441
    Abstract: A high voltage generating circuit may include a pulse signal generator, a counter, a plurality of transmitters, and/or a plurality of pumpers. The pulse signal generator may be configured to be enabled in response to a refresh command signal to output a pulse signal. The counter may be configured to count the pulse signal and sequentially output a plurality of selection signals. The plurality of transmitters may be configured to be sequentially enabled in response to individual selection signals of the plurality of selection signals to transmit the pulse signal. The plurality of pumpers may correspond to the plurality of transmitters. Each of the plurality of pumpers may be configured to collectively generate a high voltage based on the transmitted pulse signal from a corresponding transmitter of the plurality of transmitters.
    Type: Application
    Filed: May 31, 2011
    Publication date: September 29, 2011
    Inventors: Sang-hyuk Kwon, Hi-choon Lee
  • Patent number: 7969796
    Abstract: A high voltage generating circuit may include a pulse signal generator, a counter, a plurality of transmitters, and/or a plurality of pumpers. The pulse signal generator may be configured to be enabled in response to a refresh command signal to output a pulse signal. The counter may be configured to count the pulse signal and sequentially output a plurality of selection signals. The plurality of transmitters may be configured to be sequentially enabled in response to individual selection signals of the plurality of selection signals to transmit the pulse signal. The plurality of pumpers may correspond to the plurality of transmitters. Each of the plurality of pumpers may be configured to collectively generate a high voltage based on the transmitted pulse signal from a corresponding transmitter of the plurality of transmitters.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: June 28, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-hyuk Kwon, Hi-choon Lee
  • Patent number: 7860296
    Abstract: A test system includes a rotatable turntable, a loading section, a first image pickup section, a second image pickup section, a system control section and an unloading section. The loading section loads a display panel assembly onto the stage. The loading section recognizes a unique number of the display panel assembly. The first image pickup section obtains an active area image data from an active area image. A valid first active area defect is detected using an active area image data obtained from an active area image displayed on the display panel assembly. An inactive area defect is detected based on an inactive area image data and a reference inactive area image data.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: December 28, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Hyuk Kwon, Kyoung-Ho Yang, Soon-Jae Park
  • Publication number: 20100244915
    Abstract: In an example embodiment, the semiconductor device includes a clock signal generation circuit. The clock signal generation circuit is configured to generate at least one control clock signal in response to an external clock signal and a read command signal. The clock signal generation circuit includes a plurality of delay circuits, and the clock signal generation circuit is configured to selectively disable at least one of the plurality of delay circuits to reduce power consumption.
    Type: Application
    Filed: March 24, 2010
    Publication date: September 30, 2010
    Inventors: Sang-Hyuk Kwon, Byung Hoon Jeong, Jae Woong Lee
  • Publication number: 20100128543
    Abstract: A latency circuit for use in a semiconductor memory device includes a latency control clock generator generating an m-divided division signal from an external clock and at least one latency control clock from the m-divided division signal, wherein m is a natural number greater than or equal to 2. The latency circuit also includes a latency signal generator generating a latency signal in response to the at least one latency control clock, a latency control signal and an internal read command signal, wherein the latency control signal is generated from a column address strobe (CAS) latency and the internal read command signal is generated in response to a received read command.
    Type: Application
    Filed: February 1, 2010
    Publication date: May 27, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-hyuk KWON, Byung-hoon JEONG
  • Publication number: 20080170446
    Abstract: A high voltage generating circuit may include a pulse signal generator, a counter, a plurality of transmitters, and/or a plurality of pumpers. The pulse signal generator may be configured to be enabled in response to a refresh command signal to output a pulse signal. The counter may be configured to count the pulse signal and sequentially output a plurality of selection signals. The plurality of transmitters may be configured to be sequentially enabled in response to individual selection signals of the plurality of selection signals to transmit the pulse signal. The plurality of pumpers may correspond to the plurality of transmitters. Each of the plurality of pumpers may be configured to collectively generate a high voltage based on the transmitted pulse signal from a corresponding transmitter of the plurality of transmitters.
    Type: Application
    Filed: January 15, 2008
    Publication date: July 17, 2008
    Inventors: Sang-hyuk Kwon, Hi-choon Lee
  • Publication number: 20060120588
    Abstract: A test system includes a rotatable turntable, a loading section, a first image pickup section, a second image pickup section, a system control section and an unloading section. The loading section loads a display panel assembly onto the stage. The loading section recognizes a unique number of the display panel assembly. The first image pickup section obtains an active area image data from an active area image. A valid first active area defect is detected using an active area image data obtained from an active area image displayed on the display panel assembly. An inactive area defect is detected based on an inactive area image data and a reference inactive area image data.
    Type: Application
    Filed: November 10, 2005
    Publication date: June 8, 2006
    Inventors: Sang-Hyuk Kwon, Kyoung-Ho Yang, Soon-Jae Park