Abstract: An apparatus and method for balancing the flow of molten molding compound above and below an integrated circuit assembly during encapsulation of the assembly. An annular shaped layer of material is placed over the bonding fingers of a leadframe such that the annular shaped layer of material peripherally surrounds the centrally located opening in the leadframe. The annular shaped layer of material has sufficient width and thickness to slow the flow of molten molding material over the top surface of the integrated circuit assembly to the same speed as the flow of molten material under the bottom surface of the integrated circuit package assembly. In so doing, the present invention reduces the formation of blowholes or voids in encapsulated integrated circuit packages.

Abstract: Methods and apparatuses for encapsulating thermally enhanced (TE) and electrically and thermally enhanced (ETE) integrated circuit assemblies that include bulky thermally conductive heat sinks so as to prevent the formation of pinholes and IC warpage without adding bulk or additional structures. The assemblies are repositioned, through offset in the bonding fingers of the leadframe, so that the rates of mold flow in the two halves of the mold cavity are substantially balanced. The repositioning of the assemblies also substantially balances the amount of mold material in the mold halves to prevent warpage when the IC cools down.

Abstract: A method is described for creating an inductor in the package for an integrated circuit. The inductor is formed by utilizing one or more of the bond leads as the core of the inductor and by winding a series of coils about the core in connection either with the bond pads of the integrated circuit itself or to other bond leads for connection outside the integrated circuit chip.

Abstract: Encapsulated thermally enhanced (TE) and electrically and thermally enhanced (ETE) integrated circuit assemblies that include bulky thermally conductive heat sinks are disclosed. The integrated circuit assemblies are configured to prevent the formation of pinholes and IC package warpage without adding bulk or additional structures. The assemblies are repositioned, through an offset in the bonding fingers of the leadframe, so that the rates of mold flow in the two halves of the mold cavity are substantially balanced. The repositioning of the assemblies also substantially balances the amount of mold material in the mold halves, which prevents warpage in a finished IC package.

Abstract: A multi-layered, high performance integrated circuit package is disclosed having a number of design features which increase the performance and manufacturability of the integrated circuit package, and reduce the effects of parasitic noise generated within the package. The metallic layers connecting contact fingers formed on ledges around the periphery of a die cavity area, to their respective package pins are organized such that a ground metallic layer is interposed between each pair of input/output signal metallic layers, and each input/output signal metallic layer is sandwiched between a pair of metallic layers wherein one layer of the pair is connected to a voltage supply and the other layer of the pair is connected to a corresponding ground reference.

Abstract: A multi-layered, high performance integrated circuit package is disclosed having a number of design features which increase the performance and manufacturability of the integrated circuit package, and reduce the effects of parasitic noise generated within the package. The metallic layers connecting contact fingers formed on ledges around the periphery of a die cavity area, to their respective package pins are organized such that a ground metallic layer is interposed between each pair of input/output signal metallic layers, and each input/output signal metallic layer is sandwiched between a pair of metallic layers wherein one layer of the pair is connected to a voltage supply and the other layer of the pair is connected to a corresponding ground reference.

Abstract: An integrated-circuit package assembly includes a separate silicon substrate to which an integrated-circuit die is fixed. The separate silicon substrate serves as a heat spreader for the integrated-circuit die. The separate silicon substrate to which the integrated-circuit die is fixed is packaged in either a molded package body or a cavity-type package body. For the molded package body, the package body is molded around a leadframe, the integrated-circuit die, and the separate silicon substrate to which the integrated-circuit die is fixed. For a molded package body, the leadframe has bonding fingers formed at the inward ends thereof which are attached to the separate silicon substrate or the lead frame may have a die-attach pad to which is fixed the separate silicon substrate. For the cavity-type package, the package body includes a mounting surface formed adjacent to a cavity formed therein and the mounting surface has the separate silicon substrate fixed to the top surface thereof.

Abstract: A video signal selection circuit capable of reading automatically the connection state of a plurality of video jack ports and selecting only modes corresponding to video ports which presently have a jack connected thereto. This video signal selection circuit includes a predetermined number of video jack ports, a predetermined number of switches respectively connected to the video jack ports and turned on when a corresponding jack is connected to the video jack port, and a micro-processor which registers the fact that the jack is connected to the video jack port by checking whether the corresponding switch is turned on. The micro-processor outputs a control signal so that the selection circuit selects only those ports to which jacks are connected when a mode conversion key is actuated. A switching portion is controlled by the micro-processor's control signal and selects for output only those video signal sources corresponding to the control signals received from the micro-processor.

Abstract: A method for controlling a musical medley function in a karaoke television includes steps for randomly selecting song from a class of songs having similar form or theme, and continuously playing songs from the selected class. The user sets a minimum reference mark and the target number of challenging songs. Each song performed is graded, thus allowing the singer to proceed to a next song only when the graded mark exceeds the reference mark. The method includes a step for providing a celebrator message and fanfare when the number of played songs equals the target number of challenging songs, thereby prompting the user to take added interest in singing. The method is adaptable in karaoke televisions and is particularly useful in household karaoke televisions.

Abstract: A television with a karaoke player has a video function accompanied with music to which a medley function for classifying songs of the same form or theme and successively playing the classified songs by gathering them is added. According to a method for controlling the medley function, a microcomputer controls a display of thematic items of songs in response to a user's selection of the medley function. Upon selection of a thematic item, formational items of the songs are displayed. Songs falling in the selected categories are then played in order.

Abstract: A chip type capacitor with a multi-layer structure comprising a plurality of inner electrodes classified into two groups one being used as parts of signal lines and the other being connected to grounded lines. Each of the inner electrodes for radio frequency passages has a pair of inwardly extending recesses adapted to make current flows generated in the inner electrode by radio frequency noise be opposite to each other. Each of at least two grounded inner electrode pairs is interposed between vertically adjacent inner electrodes used as parts of signal lines. The inner electrodes of each pair are connected to ground terminals, respectively, and have a shape formed by removing one protruded grounding portion from a cross shape.

Abstract: An encapsulated electrically and thermally enhanced integrated circuit is disclosed. An integrated-circuit die is attached to a thermally conductive, electrically-insulated substrate. A lead frame having inwardly-extending bonding fingers has the bottom sides thereof attached to the top of the substrate. A contiguous layer of insulating material is bonded to the top sides of the bonding fingers, such that the layer of insulating material peripherally surrounds the integrated-circuit die. A conductive layer of material is then bonded to the top of the insulating layer. A second layer of insulating material followed by a second conductive layer may be bonded on top of the first conductive layer. Electrical connections are made from the integrated-circuit die to the conductive layers surrounding the die. The device is then encapsulated in a plastic material.

Abstract: A method of forming a molded plastic package having an integrated heat sink, without forming mold "flash" on an external surface of the integrated heat sink during the molding process, is described. The method generally follows conventional fabrication steps for molded plastic packages, except that a protective layer, preferably formed of a water or chemically soluble paste, or a high temperature adhesive tape, is applied to the external surface of the heat sink prior to the formation of the molded plastic package. The protective layer prevents mold "flash" from forming between the external surface of the heat sink and an inner surface of the mold during the molding process, and after formation of the molded plastic package, acts to protect the external surface of the heat sink from scratches and/or contaminants.

Abstract: An integrated-circuit die attached to a thermally conductive substrate having surface variations formed into the surface of the thermally conductive substrate. A lead frame has inwardly-extending fingers, which are attached to the thermally conductive substrate. The integrated circuit die, lead frame, and substrate are enclosed within a mold cavity. The surface variations of the thermally conductive substrate provide for a more balanced flow of plastic material over the top and bottom of the substrate provide a molded package body substantially free of voids.

Abstract: An improved packaging technique for packaging a thermally-enhanced, molded-plastic quad flat package (TE-QFP). An integrated-circuit die is attached to a thermally conductive, electrically-insulated substrate having a stepped area formed into the outer margins thereof. A lead frame has inwardly-extending fingers, which are attached to the stepped areas in the outer margins of the thermally conductive, electrically-insulated substrate. The stepped area centers the thermally conductive, electrically-insulated substrate and attached integrated-circuit die within the mold cavity so that the flow of plastic material is balanced over the top and bottom of the substrate to provide a molded package body substantially free of voids.

Abstract: A ferrite chip bead includes a ferrite substrate, a plurality of outer electrodes formed at opposite sides of the ferrite substrate, and a plurality of conductive leads each extending transversely through the ferrite substrate and having opposite ends protruded outwardly of opposite side surfaces of the ferrite substrate and connected to corresponding outer electrodes. Conductive leads are embedded in the ferrite substrate by introducing conductive leads in a central portion of a nozzle for extruding the ferrite substrate such that the conductive leads are embedded in the ferrite substrate being extruded, or by introducing conductive leads between ferrite substrate sheets being fed to be bonded together for forming the ferrite substrate such that the conductive leads are interposed between the ferrite substrate sheets being bonded. The ferrite chip has no tendency for outer electrodes to short-circuit from the ferrite substrate upon carrying the chip bead on a circuit board.

Abstract: A lead frame assembly characterized by alternating high and low wire loops which connect the attach pads of an integrated circuit die to the conductive fingers of the lead frame. The alternating loops reduce the likelihood that adjacent loops will short out due to twists in the wires or due to connecting wire "sweep" caused by subsequent plastic encapsulation. A number of high loops can be attached before the formation of the first low loop or vice versa. Alternately, the high and low wire loops can be attached in an alternating fashion.

Abstract: A method for making a ferrite chip bead array in which a plurality of reinforcing outer electrodes are formed at the upper and lower surfaces of a ferrite substrate structure having a pair of substrate sheets and a plurality of uniformly spaced conductive leads interposed between the substrate sheets to enhance the bonding force between each electrode and each corresponding inner conductive lead, as well as the bonding force between each outer electrode and each corresponding inner conductive lead as well as the bonding force between each outer electrode and the ferrite substrate structure. The reinforcing outer electrodes eliminate a tendency for outer electrodes to short-circuit from the ferrite substrate upon placement of the chip bead array on a circuit board. The subject method simplifies manufacture and prevents short circuit, thereby enhancing reliability and productivity.

Abstract: An integrated circuit package characterized by an interposer including a thin, flexible, planar insulator having a plurality of substantially radial traces provided on one side thereof. The other side of the insulator is attached to the die attach pad of a lead frame, and an integrated circuit die is attached within a die attach area of the assembly. A first set of wires couples bonding pads of the die to the traces, and a second set of wires couples the traces to bonding fingers of the lead frame. The bonding fingers, interposer, die, and both sets of wires are then encapsulated in plastic. The interposer can be advantageously manufactured in a tape automated bonding (TAB) process to provide a low cost, high performance, and versatile lead frame assembly.

Abstract: An encapsulated electrically and thermally enhanced integrated circuit is disclosed. An integrated-circuit die is attached to a thermally conductive, electrically-insulated substrate. A lead frame having inwardly-extending bonding fingers has the bottom sides thereof attached to the top of the substrate. A contiguous layer of insulating material is bonded to the top sides of the bonding fingers, such that the layer of insulating material peripherally surrounds the integrated-circuit die. A conductive layer of material is then bonded to the top of the insulating layer. A second layer of insulating material followed by a second conductive layer may be bonded on top of the first conductive layer. Electrical connections are made from the integrated-circuit die to the conductive layers surrounding the die. The device is then encapsulated in a plastic material.