Patents by Inventor Sang Won Bae

Sang Won Bae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8076198
    Abstract: A method of fabricating a nonvolatile memory device with a three-dimensional structure includes alternately stacking first and second material layers in two or more layers on a semiconductor substrate, forming trenches penetrating the stacked first and second material layers by performing a first etching process, and removing the second material layers exposed in the trenches by performing a second etching process. The first and second material layers are formed of materials that have the same main component but have different impurity contents, respectively.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: December 13, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyosan Lee, Boun Yoon, Kuntack Lee, Donghyun Kim, Daehyuk Kang, Imsoo Park, Youngok Kim, Young-Hoo Kim, Sang Won Bae
  • Publication number: 20110073866
    Abstract: In a vertical-type non-volatile memory device, an insulation layer pattern is provided on a substrate, the insulation layer pattern having a linear shape. Single-crystalline semiconductor patterns are provided on the substrate to make contact with both sidewalls of the insulation layer pattern, the single-crystalline semiconductor patterns having a pillar shape that extends in a vertical direction relative to the substrate. A tunnel oxide layer is provided on the single-crystalline semiconductor pattern. A lower electrode layer pattern is provided on the tunnel oxide layer and on the substrate. A plurality of insulation interlayer patterns is provided on the lower electrode layer pattern, the insulation interlayer patterns being spaced apart from one another by a predetermined distance along the single-crystalline semiconductor pattern. A charge-trapping layer and a blocking dielectric layer are sequentially formed on the tunnel oxide layer between the insulation interlayer patterns.
    Type: Application
    Filed: August 31, 2010
    Publication date: March 31, 2011
    Inventors: Young-Hoo Kim, Hyo-San Lee, Sang-Won Bae, Bo-Un Yoon, Kun-Tack Lee
  • Publication number: 20100181610
    Abstract: Provided are nonvolatile memory devices with a three-dimensional structure and methods of fabricating the same. The nonvolatile memory device includes conductive patterns three-dimensionally arranged on a semiconductor substrate, semiconductor patterns that extend from the semiconductor substrate and intersect one-side walls of the conductive patterns, charge storage layers interposed between the semiconductor patterns and one-side walls of the conductive patterns, and seed layer patterns interposed between the charge storage layers and one-side walls of the conductive patterns.
    Type: Application
    Filed: December 30, 2009
    Publication date: July 22, 2010
    Inventors: Young-Hoo Kim, Daehyuk Kang, Youngok Kim, Sang Won Bae, Boun Yoon, Kuntack Lee
  • Publication number: 20100178755
    Abstract: A method of fabricating a nonvolatile memory device with a three-dimensional structure includes alternately stacking first and second material layers in two or more layers on a semiconductor substrate, forming trenches penetrating the stacked first and second material layers by performing a first etching process, and removing the second material layers exposed in the trenches by performing a second etching process. The first and second material layers are formed of materials that have the same main component but have different impurity contents, respectively.
    Type: Application
    Filed: January 13, 2010
    Publication date: July 15, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyosan Lee, Boun Yoon, Kuntack Lee, Donghyun Kim, Daehyuk Kang, Imsoo Park, Youngok Kim, Young-Hoo Kim, Sang Won Bae