Patents by Inventor Sang Jin Cha
Sang Jin Cha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240082826Abstract: A method for preparing a zinc ferrite-based catalyst according to an embodiment of the present application comprises the steps of: contacting a metal precursor solution including a zinc precursor, a ferrite precursor, an acid solution and water with a basic aqueous solution to obtain a precipitate; and filtering and thereafter drying and calcining the precipitate, wherein the acid solution includes one or more of nitric acid (HNO3) and hydrocarbon acid.Type: ApplicationFiled: November 16, 2023Publication date: March 14, 2024Inventors: Sang Jin HAN, Dong Hyun KO, Kyong Yong CHA, Ye Seul HWANG, Sunhwan HWANG
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Publication number: 20140346654Abstract: A chip package comprising a carrier, a chip, a plurality of first conductive elements, an encapsulation, and a conductive film is provided. The carrier has a carrying surface and a back surface opposite to the carrying surface. Furthermore, the carrier has a plurality of common contacts in the periphery of the carrying surface. The chip is disposed on the carrying surface and electrically connected to the carrier. In addition, the first conductive elements are disposed on the common contacts respectively. The encapsulation is disposed on the carrying surface and encapsulating the chip. Moreover, the conductive film is disposed over the encapsulation and the first conductive elements, so as to electrically connect with the common contacts via the first conductive elements. A process for fabricating the chip package is further provided. The chip package is capable of preventing the EMI problem and thus provides superior electrical performance.Type: ApplicationFiled: June 2, 2014Publication date: November 27, 2014Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Soo-Min CHOI, Hyeong-No KIM, Jae-Sun AN, Young-Gue LEE, Sang-Jin CHA
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Patent number: 8866280Abstract: A chip package comprising a carrier, a chip, a plurality of first conductive elements, an encapsulation, and a conductive film is provided. The carrier has a carrying surface and a back surface opposite to the carrying surface. Furthermore, the carrier has a plurality of common contacts in the periphery of the carrying surface. The chip is disposed on the carrying surface and electrically connected to the carrier. In addition, the first conductive elements are disposed on the common contacts respectively. The encapsulation is disposed on the carrying surface and encapsulating the chip. Moreover, the conductive film is disposed over the encapsulation and the first conductive elements, so as to electrically connect with the common contacts via the first conductive elements. A process for fabricating the chip package is further provided. The chip package is capable of preventing the EMI problem and thus provides superior electrical performance.Type: GrantFiled: June 25, 2009Date of Patent: October 21, 2014Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Soo-Min Choi, Hyeong-No Kim, Jae-Sun An, Young-Gue Lee, Sang-Jin Cha
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Publication number: 20090261470Abstract: A chip package comprising a carrier, a chip, a plurality of first conductive elements, an encapsulation, and a conductive film is provided. The carrier has a carrying surface and a back surface opposite to the carrying surface. Furthermore, the carrier has a plurality of common contacts in the periphery of the carrying surface. The chip is disposed on the carrying surface and electrically connected to the carrier. In addition, the first conductive elements are disposed on the common contacts respectively. The encapsulation is disposed on the carrying surface and encapsulating the chip. Moreover, the conductive film is disposed over the encapsulation and the first conductive elements, so as to electrically connect with the common contacts via the first conductive elements. A process for fabricating the chip package is further provided. The chip package is capable of preventing the EMI problem and thus provides superior electrical performance.Type: ApplicationFiled: June 25, 2009Publication date: October 22, 2009Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Soo-Min Choi, Hyeong-No Kim, Jae-Sun An, Young-Gue Lee, Sang-Jin Cha
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Patent number: 7576415Abstract: An EMI shielded semiconductor package is provided. The package includes a substrate and a chip disposed on the substrate. The chip is electrically connected to the substrate by a plurality of bonding wires. At least one shielding conductive block is formed on the substrate and electrically connected to the ground trace of the substrate. A sealant is formed on the substrate and covers the chip, bonding wires and the shielding conductive block. The sealant has a side surface to expose a surface of the shielding conductive block. A layer of conductive film is formed on the outer surface of the sealant and covers the exposed surface of the shielding conductive block thereby shielding the chip from electromagnetic interference.Type: GrantFiled: June 15, 2007Date of Patent: August 18, 2009Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Sang Jin Cha, Hyeongno Kim
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Publication number: 20080308912Abstract: An EMI shielded semiconductor package is provided. The package includes a substrate and a chip disposed on the substrate. The chip is electrically connected to the substrate by a plurality of bonding wires. At least one shielding conductive block is formed on the substrate and electrically connected to the ground trace of the substrate. A sealant is formed on the substrate and covers the chip, bonding wires and the shielding conductive block. The sealant has a side surface to expose a surface of the shielding conductive block. A layer of conductive film is formed on the outer surface of the sealant and covers the exposed surface of the shielding conductive block thereby shielding the chip from electromagnetic interference.Type: ApplicationFiled: June 15, 2007Publication date: December 18, 2008Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Sang Jin Cha, Hyeongno Kim
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Publication number: 20080237821Abstract: A package structure and a manufacturing method thereof are provided. The package structure includes a substrate, a shielding plate, a first chip, a first sealant, a second chip and a second sealant. The substrate has a lower surface and an upper surface on which the shielding plate is disposed. The first chip disposed on the shielding plate is electrically connected to the substrate. The first sealant disposed on the upper surface encapsulates the shielding plate and the first chip. The second chip disposed on the lower surface is electrically connected to the substrate. The second sealant disposed on the lower surface encapsulates the second chip.Type: ApplicationFiled: March 28, 2007Publication date: October 2, 2008Inventors: Hyeongno Kim, Soo-Min Choi, Jae-Sun An, Young-Gue Lee, Sang-Jin Cha
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Publication number: 20080237820Abstract: A package structure including a substrate, a shielding element, a chip, a sealant layer and a semiconductor device is provided. The substrate has a first surface and a second surface opposite to the first surface. The shielding element is disposed on the first surface. The chip is disposed on the shielding element and is electrically connected to the substrate. The sealant layer is disposed on the first surface, and encapsulates the chip and the shielding element. The semiconductor device is disposed on the second surface.Type: ApplicationFiled: March 28, 2007Publication date: October 2, 2008Inventors: Hyeongno Kim, Soo-Min Choi, Jae-Sun An, Young-Gue Lee, Sang-Jin Cha
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Publication number: 20080197468Abstract: A package structure and a manufacturing method thereof are provided. The package structure includes a substrate, a first chip, a cap structure, a second chip and a sealant. The first chip is disposed in an opening of the substrate and is electrically connected to the substrate. The cap structure is disposed on the substrate corresponding to the first chip. The second chip is disposed on the cap structure and is electrically connected to the substrate. The sealant encapsulates the first chip, the cap structure and the second chip.Type: ApplicationFiled: February 15, 2007Publication date: August 21, 2008Inventors: Hyeongno Kim, Soo-Min Choi, Jae-Sun An, Young-Gue Lee, Sang-Jin Cha
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Publication number: 20080128890Abstract: A chip package comprising a carrier, a chip, a plurality of first conductive elements, an encapsulation, and a conductive film is provided. The carrier has a carrying surface and a back surface opposite to the carrying surface. Furthermore, the carrier has a plurality of common contacts in the periphery of the carrying surface. The chip is disposed on the carrying surface and electrically connected to the carrier. In addition, the first conductive elements are disposed on the common contacts respectively. The encapsulation is disposed on the carrying surface and encapsulating the chip. Moreover, the conductive film is disposed over the encapsulation and the first conductive elements, so as to electrically connect with the common contacts via the first conductive elements. A process for fabricating the chip package is further provided. The chip package is capable of preventing the EMI problem and thus provides superior electrical performance.Type: ApplicationFiled: November 30, 2006Publication date: June 5, 2008Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: SOO-MIN CHOI, HYEONG-NO KIM, JAE-SUN AN, YOUNG-GUE LEE, SANG-JIN CHA
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Publication number: 20040014008Abstract: A periodontal exerciser (1) for exercising the periodontium comprises two pairs of sidewalls (10, 11, 12, 13) formed in the shape of the upper and lower teeth alignments to surround the teeth alignments up to a part of the gum at its boundary to the tooth, and a resilient base part (14) formed centrally between the sidewalls so as to form an H-shaped cross section together with the sidewalls. Thus, if a user wearing the periodontal exercise repeatedly performs the biting motion, the pressure generated at the resilient base part is transmitted through the ends of the teeth to the Periodontal membrane, and the repeated biting motion causes the sidewalls to move to massage the gum.Type: ApplicationFiled: December 31, 2002Publication date: January 22, 2004Inventor: Sang-Jin Cha