Abstract: The invention relates to the field of special purpose robotic systems to conduct external functions such as cleaning, monitoring and inspection of structures such as tubular assets in a splash zone. The splash zone is defined as the section of a marine structure that is periodically in and out of water due to the action of waves or tides, usually falling within (+)10m to (?)20m water depth. In embodiments, splash zone inspection robot system 1 comprises station 300, submersible saddle 350, submersible robot 400, and subsea robot controller 308. A predetermined set of controllable clamps selectively secure submersible robot 400 to submersible saddle 350 or structure 2 and allow incremental traversal along submersible saddle 350 or structure 2.

Abstract: Arrangements for delivering educational content to students are disclosed. The arrangements can include a method that includes registering a student by interviewing the student and storing information associated with the student's educational history and generating parameters and variables related to the student's prior educational experiences. A query for educational content can be received from the student, with student selectable filters and tailored search criteria for educational materials can be generated based on the variables, and parameters associated with the student and the received query. The results of the search can be transmitted to a search engine and tailored search results can be received and displayed to the student. The system can be self-learning where after use by students, student specific profiles and user models can be generated which can increase the number of user parameters and variables and supplementary information in the student's profile and or model.

Abstract: The disclosed embodiments provide a method and system for processing data. During operation, the system obtains a set of records, wherein each of the records comprises one or more metrics and at least one dimension associated with the one or more metrics. Next, the system creates a data segment comprising at least one of a forward index and an inverted index for a column in the records. The system then stores the data segment in network-accessible storage and assigns the data segment to a partition. Finally, the system enables querying of the data segment through a query node associated with the partition.

Abstract: The disclosed embodiments provide a method and system for processing data. During operation, the system obtains a set of records, wherein each of the records comprises one or more metrics and at least one dimension associated with the one or more metrics. Next, the system creates a data segment comprising at least one of a forward index and an inverted index for a column in the records. The system then stores the data segment in network-accessible storage and assigns the data segment to a partition. Finally, the system enables querying of the data segment through a query node associated with the partition.

Abstract: The disclosed embodiments provide a system that processes data. During operation, the system obtains a set of records, wherein each of the records comprises one or more metrics and at least one dimension associated with the one or more metrics. Next, the system creates, in a data segment comprising the records, an inverted index for a column in the records based on a cardinality of the column. Finally, the system compresses the inverted index based on a jump value associated with record identifiers in the column.

Abstract: The disclosed embodiments provide a system that processes data. During operation, the system obtains, in a buffer, records to be included in a data segment as the records are generated, wherein each of the records comprises one or more metrics and at least one dimension associated with the one or more metrics. After the buffer reaches a threshold size, the system creates a data segment comprising at least one of a forward index and an inverted index for a column in the records. The system then enables querying of the data segment and a set of offline data segments comprising older records of the one or more metrics and the at least one dimension.

Abstract: The disclosed embodiments provide a method and system for processing data. During operation, the system obtains a set of records, wherein each of the records comprises one or more metrics and at least one dimension associated with the one or more metrics. Next, the system creates a data segment comprising at least one of a forward index and an inverted index for a column in the records. The system then stores the data segment in network-accessible storage and assigns the data segment to a partition. Finally, the system enables querying of the data segment through a query node associated with the partition.

Abstract: The present invention generally provides a decoupling capacitor circuit that is configured to determine whether a decoupling capacitor is defective. Upon determining that the decoupling capacitor is defective, the decoupling capacitor circuit may disconnect the decoupling capacitor from both, a positive segment and a negative segment of a power grid. In some embodiments, the decoupling capacitor circuit may be configured to reconnect the decoupling capacitor to the power grid upon receiving a reset signal.

Abstract: A system and method that uses a text-based script file to capture a circuit design and allows a circuit designer to manipulate the script file. The circuit designer can add, delete, or move components using various tags and commands that are stored in the script file. When the design is complete, or ready to be tested, the script file is processed creating a layout representation file that is readable by a graphics-based circuit design tool.

Abstract: The present invention generally provides a decoupling capacitor circuit that is configured to determine whether a decoupling capacitor is defective. Upon determining that the decoupling capacitor is defective, the decoupling capacitor circuit may disconnect the decoupling capacitor from both, a positive segment and a negative segment of a power grid. In some embodiments, the decoupling capacitor circuit may be configured to reconnect the decoupling capacitor to the power grid upon receiving a reset signal.

Abstract: An integrated circuit (IC) includes power supply interconnects that couple to a power source. The integrated circuit includes electronic devices that perform desired functions and further includes decoupling capacitor circuits that provide noise reduction throughout the integrated circuit. In one embodiment, each decoupling capacitor circuit includes a decoupling capacitor and a switching circuit. The switching circuit connects the decoupling capacitor to the power supply interconnects during a connect mode when the switching circuit detects no substantial decoupling capacitor leakage. However, the switching circuit effectively disconnects the decoupling capacitor from the power supply interconnects during a disconnect mode when the switching circuit detects substantial decoupling capacitor leakage. The decoupling capacitor circuit self-initializes in the connect mode without external control signals and is thus self-contained.

Abstract: An energy-saving circuit and method using charge equalization across complementary nodes reduces power consumption in memory circuits and other circuits such as wide multiplexers having complementary high-capacitance nodes. A change detection circuit detects a state change to be applied to the bitlines, and generates a pulse if a state change is to be applied. A pass gate connected between the nodes is activated in response to the pulse to equalize the charge on the bitlines. The driver circuit enable inputs are also delayed, so that the bitlines are not driven until after the charge has been equalized and the pass gate disabled. In one embodiment, the driver circuits are only enabled momentarily by a pulsed output of the change detector and keeper circuits are employed to retain the bitlines in their asserted states.

Abstract: An energy-saving circuit and method using charge equalization across complementary nodes reduces power consumption in memory circuits and other circuits such as wide multiplexers having complementary high-capacitance nodes. A change detection circuit detects a state change to be applied to the bitlines, and generates a pulse if a state change is to be applied. A pass gate connected between the nodes is activated in response to the pulse to equalize the charge on the bitlines. The driver circuit enable inputs are also delayed, so that the bitlines are not driven until after the charge has been equalized and the pass gate disabled. In one embodiment, the driver circuits are only enabled momentarily by a pulsed output of the change detector and keeper circuits are employed to retain the bitlines in their asserted states.

Abstract: An integrated circuit (IC) includes power supply interconnects that couple to a power source. The integrated circuit includes electronic devices that perform desired functions and further includes decoupling capacitor circuits that provide noise reduction throughout the integrated circuit. In one embodiment, each decoupling capacitor circuit includes a decoupling capacitor and a switching circuit. The switching circuit connects the decoupling capacitor to the power supply interconnects during a connect mode when the switching circuit detects no substantial decoupling capacitor leakage. However, the switching circuit effectively disconnects the decoupling capacitor from the power supply interconnects during a disconnect mode when the switching circuit detects substantial decoupling capacitor leakage. The decoupling capacitor circuit self-initializes in the connect mode without external control signals and is thus self-contained.

Abstract: A system and method that uses a text-based script file to capture a circuit design and allows a circuit designer to manipulate the script file. The circuit designer can add, delete, or move components using various tags and commands that are stored in the script file. When the design is complete, or ready to be tested, the script file is processed creating a layout representation file that is readable by a graphics-based circuit design tool.

Abstract: A system and method that uses a text-based script file to capture a circuit design and allows a circuit designer to manipulate the script file. The circuit designer can add, delete, or move components using various tags and commands that are stored in the script file. When the design is complete, or ready to be tested, the script file is processed creating a layout representation file that is readable by a graphics-based circuit design tool.

Abstract: An arithmetic logic unit (ALU) implemented with complementary pass gate logic using propagate, generate, and kill is provided. Broadly speaking, the ALU is a 64-bit ALU using a multi-stage global carry chain to generate intermediate fourth-bit carries that are folded with local four-bit sums to efficiently generate a final sum output. The ALU implements ones complement subtraction by incorporating a subtraction select signal to invert each bit of a second operand. The ALU circuitry implements a push-pull methodology to improve performance.

Abstract: A system and method that uses a text-based script file to capture a circuit design and allows a circuit designer to manipulate the script file. The circuit designer can add, delete, or move components using various tags and commands that are stored in the script file. When the design is complete, or ready to be tested, the script file is processed creating a layout representation file that is readable by a graphics-based circuit design tool.

Abstract: An arithmetic logic unit (ALU) implemented with complementary pass gate logic using propagate, generate, and kill is provided. Broadly speaking, the ALU is a 64-bit ALU using a multi-stage global carry chain to generate intermediate fourth-bit carries that are folded with local four-bit sums to efficiently generate a final sum output. The ALU implements ones complement subtraction by incorporating a subtraction select signal to invert each bit of a second operand. The ALU circuitry implements a push-pull methodology to improve performance.

Abstract: A method for obtaining a service in an offline mode and later completing the service in an online mode. The method includes obtaining a service in an offline mode at a communications device, wherein the service would have required at least two transactions with a first server in an online mode. The method then includes associating with the service a pointer to a sequence of at least one operation to be performed at a first server, and sending in an online mode the pointer.