Abstract: A site server agent monitors a site server for an event associated with an update process that spans multiple resources associated with multiple systems. The agent hands the monitoring off to a remote connected systems manager when a state associated with the event does not change to an expected value within a configured period of time or based on a configured condition. Connected systems manager continues to monitor the state and elevates the event to a level two incident after a second configured period of time or based on a second configured condition. When the state has still not changed after a third configured period of time or based on a third configured condition, a level one incident is generated in an incident management system associated with the site for support staff to immediately investigate the update process and resources of the systems.

Abstract: Systems and methods are provided for controlling a wake-up operation of a memory circuit. The memory circuit is configured to precharge the bit lines of a memory array sequentially during wakeup. A sleep signal is received by the first bit line of a memory cell and then a designed delay occurs prior to the precharge of a second complementary bit line. The sleep signal may then precharge the bit lines of a second memory cell with further delay between the precharge of each bit line. The memory circuit is configured to precharge both bit lines of a memory cell at the same time when an operation associated with that cell is designated.

Abstract: Disclosed herein are related to reducing power consumption of a memory device when transitioning from a sleep state to an operational state. In one aspect, the memory device includes a memory cell to store data. In one aspect, the memory device includes an output driver configured to: generate an output signal indicating the stored data, in response to a sleep tracking signal indicating that the memory cell is in the operational state, and generate the output signal having a predetermined voltage irrespective of the stored data, in response to the sleep tracking signal indicating that the memory cell is in the sleep state. In one aspect, the sleep tracking signal is delayed from a sleep control signal causing the memory cell to operate in the sleep state or the operational state.

Abstract: One example includes a method for measuring a quiescent current in a switching voltage regulator. The method includes generating a mathematical model of a circuit design associated with the switching voltage regulator. The mathematical model includes measurable parameters to describe a switching current of a power switch of the switching voltage regulator. The method also includes fabricating a circuit comprising the switching voltage regulator based on the circuit design. The fabricated circuit includes the power switch and conductive I/O. The method also includes coupling the conductive I/O of the fabricated circuit to a circuit test fixture and providing electrical signals to the conductive I/O via the circuit test fixture. The method also includes measuring the measurable parameters in response to the electrical signals and applying the measurable parameters to the mathematical model to calculate the switching current.

Abstract: A memory circuit includes a global control circuit, a first local control circuit, and a first set of word line post-decoder circuits coupled to a first set of memory cells that is configured to store a first set of data. The global control circuit is configured to generate a first and second set of global pre-decoder signals, and a first set of local address signals. The first local control circuit includes a first set of repeater circuits and a first clock pre-decoder circuit. The first set of repeater circuits is configured to generate a first and second set of local pre-decoder signals in response to the corresponding first and second set of global pre-decoder signals. The first clock pre-decoder circuit is configured to generate a first and second set of clock signals in response to the first set of local address signals and the first clock signal.

Abstract: A device may receive a machine learning model, training data, and test data, and may perform a unit test on the machine learning model to generate unit test results. The device may perform regression tests on the machine learning model, with the training data and the test data, to calculate model scores, create graphs, determine inference delays, and identify missing points for the machine learning model. The device may perform scale and longevity tests on the machine learning model, with the training data and the test data, to identify additional missing points and calculate a resource utilization for the machine learning model. The device may update the machine learning model, to generate an updated machine learning model, based on the unit test results, the model scores, the graphs, the inference delays, the missing points, the additional missing points, or the resource utilization.

Abstract: Systems and methods are provided for scheduling an automation (e.g., an automated workflow) to execute against a specified set of data (e.g., a customer support ticket) based on when time-based conditions within the automation will (or will likely) be true or satisfied with regard to the ticket. The automation's time-based conditions are represented by one or more functions designed to yield, when executed against a given ticket, a time interval during which those conditions will (or will likely) be true for that ticket. When a function produces a valid time interval, the corresponding automation is scheduled to run against the ticket during the interval. The functions may be quickly executed each time a ticket is modified (or created) because they may be created in assembly language or a native language of the computing platform that executes them.

Abstract: Systems and method are provided for operating a multi-array memory that includes a left memory array and a right memory array of a memory bank. A command is received at memory input pins. A signal representative of the command is propagated to an array control inhibitor. An array inhibit command is received on one or more other pins of the memory and provided to the array control inhibitor. The array control inhibitor is used to prevent arrival of the command to one of the left memory array and the right memory array based on the array inhibit command.

Abstract: Systems and methods are provided for a memory device. A memory device includes a memory array, a column selection circuit coupled to the memory array, where the column selection circuit is configured to generate a column selection signal, and a sense amplifier configured to receive data signals from the memory array. An enable signal generating circuit is configured to generate a first enable signal and a second enable signal. The column selection circuit generates the column selection signal based on the first enable signal, and the sense amplifier is configured to receive a data signal from the memory array in response to the second enable signal.

Abstract: During an episode of a media program, a creator of the media program requests that listeners join and participate in the episode. In reply, one or more listeners provide audio data to a control system of the media program, e.g., by speaking utterances that are captured by devices of the listeners. The audio data is processed to identify the users, and to determine attributes of the audio data, to identify words expressed in the audio data, and to determine features such as sentiments or opinions of the audio data. The listeners that provided the data are ranked or scored based on information regarding the respective listeners, the attributes of the audio data, or the words or sentiments. One or more of the listeners are recommended to the creator to be permitted to participate in the episode of the media program, or automatically joined in the episode.

Abstract: Systems and methods are provided for controlling a sleep operation for a memory array. A memory system may include a memory array with a memory cell and a word line driver, the memory array receiving a word line clock signal that enables and disables memory read and write operations of the memory cell. The memory array may further including a switching circuit coupled between the word line driver and a power source, the switching circuit being controlled by a local word line sleep signal to turn power to the word line driver on and off. A latch circuit may generate the local word line sleep signal in response to a delayed clock signal and one or more power management control signals. The word line clock signal and the delayed clock signal may both being generated as a function of a memory clock signal.

Abstract: In some implementations, a screen assembly may include at least one plate member having at least one opening; a screen, that is fluid permeable, disposed on the at least one plate member to expose the screen via the at least one opening; an aperture through the at least one plate member and the screen to receive an axle shaft; a notch extending inwardly from an outer edge of the screen assembly to provide a passage for a fluid conduit; and at least one magnet disposed on the at least one plate member.

Abstract: The present invention describes method for reducing Delayed Graft Function (DGF) and Ischemia/Reperfusion Injury (IRI) by intra-renal infusion of a C1 esterase inhibitor.

Abstract: A processor may receive and analyze client information. The processor may automatically generate at least one form specification based on the analyzing, the at least one form specification being in a format useable by an external form generation service. The processor may send the at least one form specification to the external form generation service and receive at least one signable form from the external form generation service. The processor may receive at least one signed copy of each at least one signable form. The processor may automatically establish at least one account with at least one external service based on the at least one signable form.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed that collect media metrics on computing devices. An example apparatus includes at least one memory, instructions in the apparatus, and processor circuitry to execute the instructions to determine a permission level of a meter and, in response to the determination, request a permission to access media data of an application programming interface (API), in response to determining a media session notification is available as indicated by the API, package media session data associated with the media session notification, the media session data extracted from metadata of the media session notification, obtain foreground information; and generate a package of metrics, the package of metrics including the packaged media session data and the foreground information.

Abstract: A load control system may include control-target devices for controlling an amount of power provided to an electrical load. The control-target devices may be capable of controlling the amount of power provided to the electrical load based on control instructions. The control-target devices and/or the control-instructions may be determined based on a gesture performed by a user. The user may wear a wearable control device capable of measuring movements performed by the user and transmit digital messages that may be used to control an electrical load. The wearable control device may identify gestures performed by the user for controlling a control-target device and/or provide control instructions to the control-target device based on the identified gestures. A gesture may be associated with a scene that includes a configuration of one or more control devices in a load control system.

Abstract: In some implementations, a monitoring device may obtain a plurality of time-series data streams respectively associated with a plurality of resources. The monitoring device may generate, using a plurality of machine learning models and based on the plurality of time-series data streams, a plurality of sets of multi-step forecast values, wherein each set of multi-step forecast values is associated with the plurality of resources. The monitoring device may determine, based on the plurality of sets of multi-step forecast values, a set of particular multi-step forecast values associated with the plurality of resources. The monitoring device may cause, based on the set of particular multi-step forecast values, one or more actions to be performed. In some implementations, the monitoring device may determine, based on the plurality of time-series data streams and the plurality of sets of multi-step forecast values, that a correlation exists between a first resource and a second resource.

Abstract: Certain edge networking devices such as application gateways may report status to a cloud-based threat management platform using a persistent network connection between the gateway and the cloud platform. Where a cloud computing platform for an edge networking device or the treat management platform imposes periodic timeouts, the threat management platform may monitor connects and disconnects for edge devices and asynchronously evaluate connection status of edge devices independently of a heartbeat or other signal through the persistent connection in order to distinguish periodic timeouts imposed by the cloud computing platform from networking devices that are compromised or malfunctioning.

Abstract: Circuits, systems, and methods are described herein for generating a boost voltage for a write operation of a memory cell. In one embodiment, a boost circuit includes a first inverter and a second inverter, each configured to invert a write signal. The boost circuit also includes a transistor and a capacitor. The transistor is coupled to an output of the first inverter. The transistor is configured to charge a capacitor based on the write signal and provide a supply voltage to a write driver. The capacitor is coupled to an output of the second inverter. The capacitor is configured to generate and provide a delta voltage to the write driver.

Abstract: Systems and methods are provided for a memory device. A memory device includes a memory array, a column selection circuit coupled to the memory array, where the column selection circuit is configured to generate a column selection signal, and a sense amplifier configured to receive data signals from the memory array. An enable signal generating circuit is configured to generate a first enable signal and a second enable signal. The column selection circuit generates the column selection signal based on the first enable signal, and the sense amplifier is configured to receive a data signal from the memory array in response to the second enable signal.