Patents by Inventor Sankar Das Sarma

Sankar Das Sarma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10346761
    Abstract: Example methods and mechanisms are described herein for implementing and adiabatically operating a topological quantum computing (TQC) phase gate that complements the existing Clifford operations, and thereby allows universal quantum computation with Majorana systems. Further embodiments include a testing system for the phase gate that is feasible with Majorana zero modes and demonstrates violations of the CHSH-Bell inequality. Further, the design used for the testing of the inequality leads directly to a practical platform for performing universal TQC with Majorana wires in which explicit braiding need never occur.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: July 9, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: David Clarke, Jay Deep Sau, Sankar Das Sarma
  • Publication number: 20190065982
    Abstract: Example methods and mechanisms are described herein for implementing and adiabatically operating a topological quantum computing (TQC) phase gate that complements the existing Clifford operations, and thereby allows universal quantum computation with Majorana systems. Further embodiments include a testing system for the phase gate that is feasible with Majorana zero modes and demonstrates violations of the CHSH-Bell inequality. Further, the design used for the testing of the inequality leads directly to a practical platform for performing universal TQC with Majorana wires in which explicit braiding need never occur.
    Type: Application
    Filed: October 26, 2018
    Publication date: February 28, 2019
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: David Clarke, Jay Deep Sau, Sankar Das Sarma
  • Patent number: 10133984
    Abstract: Example methods and mechanisms are described herein for implementing and adiabatically operating a topological quantum computing (TQC) phase gate that complements the existing Clifford operations, and thereby allows universal quantum computation with Majorana systems. Further embodiments include a testing system for the phase gate that is feasible with Majorana zero modes and demonstrates violations of the CHSH-Bell inequality. Further, the design used for the testing of the inequality leads directly to a practical platforms for performing universal TQC with Majorana wires in which explicit braiding need never occur.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: November 20, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: David Clarke, Jay Deep Sau, Sankar Das Sarma
  • Publication number: 20170091649
    Abstract: Example methods and mechanisms are described herein for implementing and adiabatically operating a topological quantum computing (TQC) phase gate that complements the existing Clifford operations, and thereby allows universal quantum computation with Majorana systems. Further embodiments include a testing system for the phase gate that is feasible with Majorana zero modes and demonstrates violations of the CHSH-Bell inequality. Further, the design used for the testing of the inequality leads directly to a practical platforms for performing universal TQC with Majorana wires in which explicit braiding need never occur.
    Type: Application
    Filed: June 30, 2016
    Publication date: March 30, 2017
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: David Clarke, Jay Deep Sau, Sankar Das Sarma
  • Patent number: 8620835
    Abstract: Disclosed herein is a protocol that enables the ?/8-gate in chiral topological superconductors in which superconducting stiffness ? has been suppressed. The protocol enables a topologically protected ?/8-gate in any pure Ising system that can be fabricated into genus=1 surface. By adding the ?/8-gate to previously known techniques, a design for universal topologically protected quantum computation which may be implemented using rather conventional materials may be obtained.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: December 31, 2013
    Assignee: Microsoft Corporation
    Inventors: Michael Freedman, Parsa Bonderson, Chetan Nayak, Sankar Das Sarma
  • Patent number: 8583903
    Abstract: Disclosed herein are efficient geometries for dynamical topology changing (DTC), together with protocols to incorporate DTC into quantum computation. Given an Ising system, twisted depletion to implement a logical gate T, anyonic state teleportation into and out of the topology altering structure, and certain geometries of the (1,?2)-bands, a classical computer can be enabled to implement a quantum algorithm.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: November 12, 2013
    Assignee: Microsoft Corporation
    Inventors: Michael Freedman, Parsa Bonderson, Chetan Nayak, Sankar Das Sarma
  • Publication number: 20110161638
    Abstract: Disclosed herein are efficient geometries for dynamical topology changing (DTC), together with protocols to incorporate DTC into quantum computation. Given an Ising system, twisted depletion to implement a logical gate T, anyonic state teleportation into and out of the topology altering structure, and certain geometries of the (1,?2)-bands, a classical computer can be enabled to implement a quantum algorithm.
    Type: Application
    Filed: December 28, 2010
    Publication date: June 30, 2011
    Applicant: Microsoft Corporation
    Inventors: Michael Freedman, Parsa Bonderson, Chetan Nayak, Sankar Das Sarma
  • Publication number: 20110156008
    Abstract: Disclosed herein is a protocol that enables the ?/8-gate in chiral topological superconductors in which superconducting stiffness ? has been suppressed. The protocol enables a topologically protected ?/8-gate in any pure Ising system that can be fabricated into genus=1 surface. By adding the ?/8-gate to previously known techniques, a design for universal topologically protected quantum computation which may be implemented using rather conventional materials may be obtained.
    Type: Application
    Filed: December 28, 2010
    Publication date: June 30, 2011
    Applicant: Microsoft Corporation
    Inventors: Michael Freedman, Parsa Bonderson, Chetan Nayak, Sankar Das Sarma
  • Patent number: 7598514
    Abstract: A quantum computer can only function stably if it can execute gates with extreme accuracy. “Topological protection” is a road to such accuracies. Quasi-particle interferometry is a tool for constructing topologically protected gates. Assuming the corrections of the Moore-Read Model for ?=5/2's FQHE (Nucl. Phys. B 360, 362 (1991)) we show how to manipulate the collective state of two e/4-charge anti-dots in order to switch said collective state from one carrying trivial SU(2) charge, |1>, to one carrying a fermionic SU(2) charge |?>. This is a NOT gate on the {|1>, |?>} qubit and is effected by braiding of an electrically charged quasi particle ? which carries an additional SU(2)-charge. Read-out is accomplished by ?-particle interferometry.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: October 6, 2009
    Assignee: Microsoft Corporation
    Inventors: Michael H. Freedman, Chetan V. Nayak, Sankar Das Sarma
  • Publication number: 20080224726
    Abstract: A quantum computer can only function stably if it can execute gates with extreme accuracy. “Topological protection” is a road to such accuracies. Quasi-particle interferometry is a tool for constructing topologically protected gates. Assuming the corrections of the Moore-Read Model for ?=5/2's FQHE (Nucl. Phys. B 360, 362 (1991)) we show how to manipulate the collective state of two e/4-charge anti-dots in order to switch said collective state from one carrying trivial SU(2) charge, |1>, to one carrying a fermionic SU(2) charge |?>. This is a NOT gate on the {|1>, |?>} qubit and is effected by braiding of an electrically charged quasi particle ? which carries an additional SU(2)-charge. Read-out is accomplished by ?-particle interferometry.
    Type: Application
    Filed: May 28, 2008
    Publication date: September 18, 2008
    Applicant: Microsoft Corporation
    Inventors: Michael H. Freedman, Chetan V. Nayak, Sankar Das Sarma
  • Patent number: 7394092
    Abstract: A quantum computer can only function stably if it can execute gates with extreme accuracy. “Topological protection” is a road to such accuracies. Quasi-particle interferometry is a tool for constructing topologically protected gates. Assuming the corrections of the Moore-Read Model for ?=5/2's FQHE (Nucl. Phys. B 360, 362 (1991)) we show how to manipulate the collective state of two e/4-charge anti-dots in order to switch said collective state from one carrying trivial SU(2) charge, |1>, to one carrying a fermionic SU(2) charge |?>. This is a NOT gate on the {|1>, |?>} qubit and is effected by braiding of an electrically charged quasi particle a which carries an additional SU(2)-charge. Read-out is accomplished by ?-particle interferometry.
    Type: Grant
    Filed: October 6, 2006
    Date of Patent: July 1, 2008
    Assignee: Microsoft Corporation
    Inventors: Michael H. Freedman, Chetan V. Navak, Sankar Das Sarma