Abstract: An apparatus has processing circuitry and a memory system. The memory system is responsive to a first type of memory access operation for which a time taken to handle the memory access operation is unbounded, the operation is able to change contents of data stored in the memory system, and a response is required. The apparatus has memory access operation handling circuitry that receives an indication of an interrupt to be taken while a memory access operation of the first type is being handled by the memory system and determines whether the memory access operation has reached a stage for which a remaining time to complete the memory access operation will be bounded. In dependence on the remaining time, the memory access operation handling circuitry either stalls the interrupt until the memory access operation has completed or aborts the memory access operation and allow the interrupt to be taken.

Abstract: Apparatuses and methods of operating apparatus are disclosed. A processing element performs data processing operations with respect to data items stored in data storage. In a first mode the processing element references the data items using physical addresses and in a second mode the processing element references the data items using virtual addresses. A data access request handling unit receives data access requests issued by the processing element and cache stores cache lines of temporary copies of the data items retrieved from the data storage, wherein a cache line in which a data item is stored in the cache is selected in dependence on an address index portion.

Abstract: Apparatuses and methods of operating apparatus are disclosed. A processing element performs data processing operations with respect to data items stored in data storage. In a first mode the processing element references the data items using physical addresses and in a second mode the processing element references the data items using virtual addresses. A data access request handling unit receives data access requests issued by the processing element and cache stores cache lines of temporary copies of the data items retrieved from the data storage, wherein a cache line in which a data item is stored in the cache is selected in dependence on an address index portion.