Abstract: In one embodiment, an integrated circuit including a plurality of input/output (I/O) buffers is disclosed. The integrated circuit contains a plurality of I/O buffers. Each of the I/O buffers include an I/O test circuit that generates test pattern signals whenever the integrated circuit is operating in a loopback test mode. According to a further embodiment, the integrated circuit includes one or more programmable delay circuits coupled to the I/O buffers that permit switching state (AC) loopback timing tests to be conducted.

Abstract: A system includes an operating system capable of providing a first operating environment and a first routine running outside the first operating environment. The first routine is adapted to selectively load the operating system or to present an interface through which a user may access and change or update predetermined information. The routine is adapted to transition the system to an off state without loading the operating system.

Abstract: Signal driving circuitry includes first and second drivers that are coupled to different points on a transmission line having an impedance. The first driver includes a transistor and a resistance that matches the transmission line impedance. The transistor is active to drive the transmission line to a specified voltage when the first and second drivers are inactive. In one configuration, the first and second drivers include CMOS drivers. In another configuration, the first driver includes a CMOS driver while the second driver includes a GTL-type driver. Termination devices in the first and second drivers may be alternately switched in and out of the signal driving circuitry depending on which driver is activated.