Abstract: A parameterized register interface of an integrated circuit and methods of register programming. An integrated circuit includes a digital controller, at least one client comprising at least one programmable register and a parameterized bus coupled to the digital controller and the client. The digital controller is configured to: transfer, via the parameterized bus, address data and/or register data between the digital controller and the client according to one or more interface signals conveyed over the parameterized bus; generate a transaction command comprising at least one transaction specific to the programmable register of the client, the transaction command generated according to a predetermined register programming protocol; and transfer, via the parameterized bus, the transaction command together with at least one predetermined combination of the interface signals to the client. The programmable register is configured to perform the transaction in accordance with the transaction command.

Abstract: A mixed signal system includes a digital domain and an analog domain. The analog domain includes a plurality of BARs. Each BAR includes addressable registers. The digital domain includes an interface configured to communicate with the analog domain, e.g., write data to an addressable register within a BAR by transmitting a first select signal to select a first BAR of the plurality of BARs. The interface transmits an address of the addressable register of the first BAR and broadcasts the write data to the first BAR and at least one BAR other than the first BAR. The analog domain transmits data from a second BAR of the plurality of BARs to the digital domain by gating a select BAR signal associated with each BAR with its corresponding content stored therein to form respective BAR output and further by gating the respective BAR outputs with one another.

Abstract: A mixed signal system includes a digital domain and an analog domain. The analog domain includes a plurality of BARs. Each BAR includes addressable registers. The digital domain includes an interface configured to communicate with the analog domain, e.g., write data to an addressable register within a BAR by transmitting a first select signal to select a first BAR of the plurality of BARs. The interface transmits an address of the addressable register of the first BAR and broadcasts the write data to the first BAR and at least one BAR other than the first BAR. The analog domain transmits data from a second BAR of the plurality of BARs to the digital domain by gating a select BAR signal associated with each BAR with its corresponding content stored therein to form respective BAR output and further by gating the respective BAR outputs with one another.

Abstract: Various aspects of apparatus for accessing a network through a wireless access point and methods of power savings for such apparatus include autonomously alternating between a listen state and the sleep state during a time period in which no data is detected from the remote apparatus, and progressively increase the sleep state interval during the time period for at least a portion of the time period.

Abstract: A wireless communication device having a root complex, a WLAN module, a power module and an interface linking the root complex and the WLAN module, wherein the root complex is configured to implement a power management policy based upon a latency tolerance value for the WLAN module and wherein the power module is configured to adjust the latency tolerance value based upon receive and transmit parameters of the WLAN module. The power module may be configured to adjust the latency tolerance value on a per-frame basis.

Abstract: In a serial communication system having a device including a receiver detection module, this specification is directed to systems and methods for selectively reducing the power consumed by the receiver detection module, preferably when the device is operating in a low power mode. In some embodiments, a signal detection module is configured to receive a control signal from the transmitter of a device at the other end of the communications link to control the operation of the receiver detection module. The control signal may be in-band or may be transmitted on a sideband of the serial link.

Abstract: Various aspects of apparatus for accessing a network through a wireless access point and methods of power savings for such apparatus include scheduling a sleep state interval, entering a sleep state at the beginning of the scheduled sleep interval, and buffering data during the sleep state for transmission following the sleep state.

Abstract: Systems and methods are disclosed for operating an interface of an electronic device in an active mode or a power save mode based, at least in part, on a condition of a data exchange module buffer. When buffer space is available, incoming data may be stored locally and the interface used to access remote memory storage may be in a power save mode. The interface may revert to active mode to transfer data to the remote memory, such as after a configurable reception interval. Outgoing data may also be stored in a buffer, allowing the interface to be in a power save mode with information transmitted from the buffer.

Abstract: In a serial communication system having a device including a receiver detection module, this specification is directed to systems and methods for selectively reducing the power consumed by the receiver detection module, preferably when the device is operating in a low power mode. In some embodiments, a signal detection module is configured to receive a control signal from the transmitter of a device at the other end of the communications link to control the operation of the receiver detection module. The control signal may be in-band or may be transmitted on a sideband of the serial link.

Abstract: Various aspects of apparatus for accessing a network through a wireless access point and methods of power savings for such apparatus include operating in a sleep state, and scheduling one or more sleep state intervals for operating in the sleep state during a time period, wherein the scheduled one or more sleep state intervals are based on one or more wireless transmission parameters.

Abstract: Systems and methods are disclosed for operating an interface of an electronic device in an active mode or a power save mode based, at least in part, on a condition of a data exchange module buffer. When buffer space is available, incoming data may be stored locally and the interface used to access remote memory storage may be in a power save mode. The interface may revert to active mode to transfer data to the remote memory, such as after a configurable reception interval. Outgoing data may also be stored in a buffer, allowing the interface to be in a power save mode with information transmitted from the buffer.

Abstract: Various aspects of apparatus for accessing a network through a wireless access point and methods of power savings for such apparatus include scheduling a sleep state interval, entering a sleep state at the beginning of the scheduled sleep interval, and buffering data during the sleep state for transmission following the sleep state.

Abstract: Various aspects of apparatus for accessing a network through a wireless access point and methods of power savings for such apparatus include autonomously alternating between a listen state and the sleep state during a time period in which no data is detected from the remote apparatus, and progressively increase the sleep state interval during the time period for at least a portion of the time period.

Abstract: Various aspects of apparatus for accessing a network through a wireless access point and methods of power savings for such apparatus include operating in a sleep state, and scheduling one or more sleep state intervals for operating in the sleep state during a time period, wherein the scheduled one or more sleep state intervals are based on one or more wireless transmission parameters.

Abstract: A wireless communication device having a root complex, a WLAN module, a power module and an interface linking the root complex and the WLAN module, wherein the root complex is configured to implement a power management policy based upon a latency tolerance value for the WLAN module and wherein the power module is configured to adjust the latency tolerance value based upon receive and transmit parameters of the WLAN module. The power module may be configured to adjust the latency tolerance value on a per-frame basis.

Abstract: In a serial communication system having a device including a receiver detection module, this specification is directed to systems and methods for selectively reducing the power consumed by the receiver detection module, preferably when the device is operating in a low power mode. In some embodiments, a signal detection module is configured to receive a control signal from the transmitter of a device at the other end of the communications link to control the operation of the receiver detection module. The control signal may be in-band or may be transmitted on a sideband of the serial link.