Patents by Inventor Sasha N. OSTER

Sasha N. OSTER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10484120
    Abstract: Embodiments include a wavelength selective communication system for use in vehicles. In an embodiment, the communication system may include a primary dielectric waveguide having a first cross-sectional area. In an embodiment, a coupling arm dielectric waveguide may be communicatively coupled to the primary dielectric waveguide. In an embodiment, the coupling arm has a second cross-sectional area that is smaller than or equal to the cross-sectional area of the first cross-sectional area. According to an embodiment, the coupling arm is communicatively coupled to the primary dielectric waveguide by a waveguide connector.
    Type: Grant
    Filed: September 30, 2017
    Date of Patent: November 19, 2019
    Assignee: Intel Corporation
    Inventors: Sasha N. Oster, Georgios C. Dogiamis, Telesphor Kamgaing, Adel A. Elsherbini, Johanna M. Swan, Erich N. Ewy
  • Patent number: 10476545
    Abstract: Communication is described between integrated circuit packages using a millimeter-wave wireless radio fabric. In one example a first package has a radio transceiver to communicate with a radio transceiver of a second package. The second package has a radio transceiver to communicate with the radio transceiver of the first package. A switch communicates with the first package and the second package to establish a connection through the respective radio transceivers between the first package and the second package. A system board carries the first package, the second package, and the switch.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: November 12, 2019
    Assignee: Intel Corporation
    Inventors: Adel A. Elsherbini, Telesphor Kamgaing, Sasha N. Oster, Brandon M. Rawlings, Georgios C. Dogiamis
  • Patent number: 10468737
    Abstract: Embodiments include waveguide launchers and connectors (WLCs), and a method of forming a WLC. The WLC has a waveguide connector with a waveguide launcher, a taper, and a slot-line signal converter; and a balun structure on the slot-line signal converter, where the taper is on the slot-line signal converter and a terminal end of the waveguide connector to form a channel and a tapered slot. The WLC may have the waveguide connector disposed on the package, and a waveguide coupled to waveguide connector. The WLC may include assembly pads and external walls of the waveguide connector electrically coupled to package. The WLC may have the balun structure convert a signal to a slot-line signal, and the waveguide launcher converts the slot-line signal to a closed waveguide mode signal, and emits the closed signal along channel and propagates the closed signal along taper slot to the waveguide coupled to waveguide connector.
    Type: Grant
    Filed: December 30, 2017
    Date of Patent: November 5, 2019
    Assignee: Intel Corporation
    Inventors: Georgios C. Dogiamis, Sasha N. Oster, Adel A. Elsherbini, Telesphor Kamgaing
  • Publication number: 20190334227
    Abstract: Embodiments of the invention include a base station that includes a central transceiver unit (CTU) having a plurality of transceiver cores and a substrate. A printed circuit board (PCB) supports the substrate and at least one antenna unit is coupled to the PCB with at least one of a cable and a waveguide. The at least one antenna unit transmits and receives communications at a frequency of approximately 4 GHz or higher.
    Type: Application
    Filed: December 14, 2016
    Publication date: October 31, 2019
    Inventors: Georgios C. DOGIAMIS, Sasha N. OSTER, Telesphor KAMGAING
  • Publication number: 20190333882
    Abstract: In various embodiments, disclosed herein are systems and methods directed to the fabrication of a coreless semiconductor package (e.g., a millimeter (mm)-wave antenna package) having an asymmetric build-up layer count that can be fabricated on both sides of a temporary substrate (e.g., a core). The asymmetric build-up layer count can reduce the overall layer count in the fabrication of the semiconductor package and can therefore contribute to fabrication cost reduction. In further embodiments, the semiconductor package (e.g., a millimeter (mm)-wave antenna packages) can further comprise dummification elements disposed near one or more antenna layers. Further, the dummification elements disposed near one or more antenna layers can reduce image current and thereby increasing the antenna gain and efficiency.
    Type: Application
    Filed: July 1, 2016
    Publication date: October 31, 2019
    Applicant: Intel Corporation
    Inventors: Telesphor KAMGAING, Adel A. ELSHERBINI, Sasha N. OSTER
  • Patent number: 10461388
    Abstract: Radio frequency (RF) data transfer between components in rack mounted systems is facilitated through the use of dielectric waveguides and millimeter Wave (mm-Wave) transceivers. A signal generator provides one or more data signals to a serializer/deserializer (SERDES) which serializes a plurality of parallel data signals to produce a single, serialized, signal containing data from each of the input signals to the SERDES. A mm-Wave die upconverts the serialized signal to a mm-Wave signal and a mm-Wave launcher launches the signal into the dielectric waveguide. At the receiving end the process is reversed such that the mm-Wave signal is first downconverted and passed through a SERDES to provide the original one or more signals to a recipient signal generator. Some or all of the components may be formed directly in the semiconductor package.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: October 29, 2019
    Assignee: INTEL CORPORATION
    Inventors: Telesphor Kamgaing, Georgios C. Dogiamis, Sasha N. Oster
  • Publication number: 20190326213
    Abstract: Embodiments of the invention include a microelectronic device that includes a substrate having transistor layers and interconnect layers including conductive layers to form connections to transistor layers. A capacitive bump is disposed on the interconnect layers. The capacitive bump includes a first electrode, a dielectric layer, and a second electrode. In another example, an inductive bump is disposed on the interconnect layers. The inductive bump includes a conductor and a magnetic layer that surrounds the conductor.
    Type: Application
    Filed: December 30, 2016
    Publication date: October 24, 2019
    Inventors: Telesphor KAMGAING, Georgios C. DOGIAMIS, Sasha N. OSTER
  • Patent number: 10452571
    Abstract: Microelectronic package communications are described that use radio interfaces that are connected through waveguides. One example includes an integrated circuit chip, a package substrate to carry the integrated circuit chip, the package substrate having conductive connectors to connect the integrated circuit chip to external components, and a radio on the package substrate coupled to the radio chip to modulate the data over a carrier and to transmit the modulated data. A waveguide connector is coupled to a dielectric waveguide to receive the transmitted modulated data from the radio and to couple it into the waveguide, the waveguide carries the modulated data to an external component.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: October 22, 2019
    Assignee: Intel Corporation
    Inventors: Sasha N. Oster, Telesphor Kamgaing, Adel A. Elsherbini, Georgios C. Dogiamis, Brandon M. Rawlings
  • Publication number: 20190312001
    Abstract: A system for packaging integrated circuits includes an integrated circuit having one or more integrated circuit terminals. The system for packaging integrated circuits also includes a substrate having one or more substrate terminals. The system for packaging integrated circuits further includes an electrically conductive adhesive in communication with the integrated circuit terminals and the substrate terminals. The electrically conductive adhesive establishes an electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals. The electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals are enclosed in a dielectric. The system for packaging integrated circuits includes a second adhesive in communication with the integrated circuit and the substrate, wherein the second adhesive couples the integrated circuit and substrate together.
    Type: Application
    Filed: December 30, 2016
    Publication date: October 10, 2019
    Inventors: Veronica A. Strong, Sasha N. Oster, Shawna M. Liff
  • Publication number: 20190297975
    Abstract: Embodiments of the invention include an active venting system. According to an embodiment of the invention, the active venting system may include a substrate having one or more seams formed through the substrate. In order to open the vents defined by the seams through the substrate, a piezoelectric layer may be formed proximate to one or more of the seams. Additional embodiments may include a first electrode and a second electrode that contact the piezoelectric layer in order to provide a voltage differential across the piezoelectric layer. In an embodiment the active venting system may be integrated into a garment. In such an embodiment, the garment may also include an electronics module for controlling the actuators. Additionally, conductive traces may be printed on the garment or sewn into the garment to provide electrical connections from the electronics module to each of the piezoelectric actuators.
    Type: Application
    Filed: July 2, 2016
    Publication date: October 3, 2019
    Inventors: Aleksandar ALEKSOV, Sasha N. OSTER, Feras EID, Shawna M. LIFF, Thomas L. SOUNART, Johanna M. SWAN, Baris BICEN, Valluri R. RAO
  • Patent number: 10424559
    Abstract: An embodiment includes an apparatus comprising: a semiconductor die; package molding that is molded onto and conformal with a first die surface of the semiconductor die and at least two sidewalls of the semiconductor die, the package molding including: (a)(i) a first surface contacting the semiconductor die, (a)(ii) a second surface opposite the first surface, and (a)(iii) an aperture that extends from the first surface to the second surface; and a polymer substantially filling the aperture; wherein the package molding includes a first thermal conductivity (watts per meter kelvin (W/(m·K)) and the polymer includes a second thermal conductivity that is greater than the first thermal conductivity. Other embodiments are described herein.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: September 24, 2019
    Assignee: Intel Corporation
    Inventors: Feras Eid, Nader N. Abazarnia, Johanna M. Swan, Taesha D. Beasley, Sasha N. Oster, Tannaz Harirchian, Shawna M. Liff
  • Publication number: 20190288382
    Abstract: Embodiments of the invention include a microelectronic device that includes a first substrate having organic dielectric material, conductive layers, and a first portion of a distributed antenna unit. The first substrate supports at least one radio frequency (RF) component. A second substrate is coupled to the first substrate. The second substrate is integrated with a housing of the microelectronic device and includes a second portion of the distributed antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher.
    Type: Application
    Filed: December 30, 2016
    Publication date: September 19, 2019
    Inventors: Telesphor KAMGAING, Sasha N. OSTER, Georgios C. DOGIAMIS
  • Publication number: 20190288371
    Abstract: Embodiments of the invention include a microelectronic device that includes a first substrate having radio frequency (RF) circuits and a second substrate coupled to the first substrate. The second substrate includes a first section and a second section with the second substrate being foldable in order to obtain a desired orientation of an antenna unit of the second section for transmitting and receiving communications at a frequency of approximately 4 GHz or higher.
    Type: Application
    Filed: December 20, 2016
    Publication date: September 19, 2019
    Applicant: Intel Corporation
    Inventors: Telesphor KAMGAING, Georgios C. DOGIAMIS, Sasha N. OSTER
  • Patent number: 10418605
    Abstract: An apparatus system is provided which comprises: a fabric; a self-assembled monolayer (SAM) material formed on the fabric; and a battery cell formed on the fabric, wherein a current collector of the battery cell is at least in part formed on the SAM material.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: September 17, 2019
    Assignee: Intel Corporation
    Inventors: Veronica A. Strong, Sasha N. Oster, Feras Eid, Aranzazu Maestre Caro
  • Patent number: 10404499
    Abstract: Embodiments of the present disclosure may relate to a transmitter that includes a baseband dispersion compensator to perform baseband dispersion compensation on an input signal. Embodiments may also include a receiver that includes a radio frequency (RF) dispersion compensator to perform RF dispersion compensation. Embodiments may also include a dielectric waveguide coupled with the transmitter and the receiver, the dielectric waveguide to convey the RF signal from the transmitter to the receiver. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: September 3, 2019
    Assignee: Intel Corporation
    Inventors: Georgios C. Dogiamis, Emanuel Cohen, Sasha N. Oster, Telesphor Kamgaing
  • Publication number: 20190259622
    Abstract: Embodiments include devices and methods, including a method for processing a substrate. The method includes providing a substrate including a first portion and a second portion, the first portion including a feature, the feature including an electrically conductive region, the second portion including a dielectric surface region. The method also includes performing self-assembled monolayer (SAM) assisted structuring plating to form a structure comprising a metal on the dielectric surface region, the feature being formed using a process other than the SAM assisted structuring plating used to form the structure, and the structure being formed after the feature. Other embodiments are described and claimed.
    Type: Application
    Filed: April 30, 2019
    Publication date: August 22, 2019
    Inventors: Sasha N. OSTER, Fay HUA, Telesphor KAMGAING, Adel A. ELSHERBINI, Henning BRAUNISCH, Johanna M. SWAN
  • Patent number: 10368439
    Abstract: An apparatus including a substrate including a first side and an opposite second side; at least one first circuit device on the first side of the substrate, at least one second device on the second side of the substrate; and a support on the second side of the substrate, the support including interconnections connected to the at least one first and second circuit device, the support having a thickness dimension operable to define a dimension from the substrate greater than a thickness dimension of the at least one second circuit device. A method including disposing at least one first circuit component on a first side of a substrate; disposing at least one second circuit component on a second side of the substrate; and coupling a support to the substrate, the substrate defining a dimension from the substrate greater than a thickness dimension of the at least one second circuit component.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: July 30, 2019
    Assignee: Intel Corporation
    Inventors: Adel A. Elsherbini, Aleksandar Aleksov, Sasha N. Oster, Shawna M. Liff
  • Patent number: 10353146
    Abstract: Various embodiments disclosed relate to a stretchable packaging system. The system includes a first electronic component. The first electronic component includes a first optical emitter. The system further includes a second electronic component. The second electronic component includes a first receiver. An optical interconnect including a first elastomer having a first refractive index connects the first optical emitter to the first receiver. An encapsulate layer including a second elastomer having a second refractive index at least partially encapsulates the first electronic component, the second electronic component, and the optical interconnect.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: July 16, 2019
    Assignee: Intel Corporation
    Inventors: Aleksandar Aleksov, Michael C. Rifani, Sasha N. Oster, Adel A. Elsherbini
  • Publication number: 20190207290
    Abstract: A method of making a waveguide, comprises: extruding a first dielectric material as a waveguide core of the waveguide, wherein the waveguide core is elongate; and coextruding an outer layer with the waveguide core, wherein the outer layer is arranged around the waveguide core.
    Type: Application
    Filed: September 30, 2016
    Publication date: July 4, 2019
    Inventors: Brandon M. Rawlings, Shawna M. Liff, Sasha N. Oster, Georgios C. Dogiamis, Telesphor Kamgaing, Adel A. Elsherbini, Aleksandar Aleksov, I, Johanna M. Swan, Richard J. Dischier
  • Publication number: 20190207287
    Abstract: Embodiments include waveguide launchers and connectors (WLCs), and a method of forming a WLC. The WLC has a waveguide connector with a waveguide launcher, a taper, and a slot-line signal converter; and a balun structure on the slot-line signal converter, where the taper is on the slot-line signal converter and a terminal end of the waveguide connector to form a channel and a tapered slot. The WLC may have the waveguide connector disposed on the package, and a waveguide coupled to waveguide connector. The WLC may include assembly pads and external walls of the waveguide connector electrically coupled to package. The WLC may have the balun structure convert a signal to a slot-line signal, and the waveguide launcher converts the slot-line signal to a closed waveguide mode signal, and emits the closed signal along channel and propagates the closed signal along taper slot to the waveguide coupled to waveguide connector.
    Type: Application
    Filed: December 30, 2017
    Publication date: July 4, 2019
    Inventors: Georgios C. DOGIAMIS, Sasha N. OSTER, Adel A. ELSHERBINI, Telesphor KAMGAING