Abstract: A memory film and a semiconductor channel can be formed within each memory opening that extends through a stack including an alternating plurality of insulator layers and sacrificial material layers. After formation of backside recesses through removal of the sacrificial material layers selective to the insulator layers, a metallic barrier material portion can be formed in each backside recess. A cobalt portion can be formed in each backside recess. Each backside recess can be filled with a cobalt portion alone, or can be filled with a combination of a cobalt portion and a metallic material portion including a material other than cobalt.

Abstract: 3D NAND memory structures and related method are provided. In some embodiments such structures can include a control gate material and a floating gate material disposed between a first insulating layer and a second insulating layer, an interpoly dielectric (IPD) layer disposed between the floating gate material and control gate material such that the IPD layer electrically isolates the control gate material from the floating gate material, and a tunnel dielectric material deposited on the floating gate material opposite the control gate material.

Abstract: 3D NAND memory structures and related method are provided. In some embodiments such structures can include a control gate material and a floating gate material disposed between a first insulating layer and a second insulating layer, an interpoly dielectric (IPD) layer disposed between the floating gate material and control gate material such that the IPD layer electrically isolates the control gate material from the floating gate material, and a tunnel dielectric material deposited on the floating gate material opposite the control gate material.

Abstract: A method of manufacturing a semiconductor structure includes forming a stack of alternating layers comprising insulating layers and spacer material layers over a semiconductor substrate, forming a memory opening through the stack, forming an aluminum oxide layer having a horizontal portion at a bottom of the memory opening and a vertical portion at least over a sidewall of the memory opening, where the horizontal portion differs from the vertical portion by at least one of structure or composition, and selectively etching the horizontal portion selective to the vertical portion.

Abstract: An alternating stack of insulating layers and sacrificial material layers can be formed over a substrate. Memory stack structures and a backside trench are formed through the alternating stack. Backside recesses are formed by removing the sacrificial material layers from the backside trench selective to the insulating layers. A cobalt-semiconductor alloy portion is formed in each backside recess by reacting cobalt and a semiconductor material. Conductive material in the backside trench can be removed by an etch to electrically isolate cobalt-containing alloy portions located in different backside recesses. Electrically conductive layers including a respective cobalt-semiconductor alloy portion can be employed as word lines of a three-dimensional memory device.

Abstract: A memory film and a semiconductor channel can be formed within each memory opening that extends through a stack including an alternating plurality of insulator layers and sacrificial material layers. After formation of backside recesses through removal of the sacrificial material layers selective to the insulator layers, a metallic barrier material portion can be formed in each backside recess. A cobalt portion can be formed in each backside recess. Each backside recess can be filled with a cobalt portion alone, or can be filled with a combination of a cobalt portion and a metallic material portion including a material other than cobalt.

Abstract: A memory film and a semiconductor channel can be formed within each memory opening that extends through a stack including an alternating plurality of insulator layers and sacrificial material layers. After formation of backside recesses through removal of the sacrificial material layers selective to the insulator layers, a metallic barrier material portion can be formed in each backside recess. A molybdenum-containing portion can be formed in each backside recess. Each backside recess can be filled with a molybdenum-containing portion alone, or can be filled with a combination of a molybdenum-containing portion and a metallic material portion including a material other than molybdenum.

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. A dielectric collar structure can be formed prior to formation of an epitaxial channel portion, and can be employed to protect the epitaxial channel portion during replacement of the sacrificial material layers with electrically conductive layers. Exposure of the epitaxial channel portion to an etchant during removal of the sacrificial material layers is avoided through use of the dielectric collar structure. Additionally or alternatively, facets on the top surface of the epitaxial channel portion can be reduced or eliminated by forming the epitaxial channel portion to a height that exceeds a target height, and by recessing a top portion of the epitaxial channel portion. The recess etch can remove protruding portions of the epitaxial channel portion at a greater removal rate than a non-protruding portion.

Abstract: A contact via structure can include a ruthenium portion formed by selective deposition of ruthenium on a semiconductor surface at the bottom of a contact trench. The ruthenium-containing portion can reduce contact resistance at the interface with an underlying doped semiconductor region. At least one conductive material portion can be formed in the remaining volume of the contact trench to form a contact via structure. Alternatively or additionally, a contact via structure can include a tensile stress-generating portion and a conductive material portion. In case the contact via structure is formed through an alternating stack of insulating layers and electrically conductive layers that include a compressive stress-generating material, the tensile stress-generating portion can at least partially cancel the compressive stress generated by the electrically conductive layers. The conductive material portion of the contact via structure can include a metallic material or a doped semiconductor material.

Abstract: A monolithic three-dimensional memory device includes a first memory block containing a plurality of memory sub-blocks located on a substrate. Each memory sub-block includes a set of memory stack structures and a portion of alternating layers laterally surrounding the set of memory stack structures. The alternating layers include insulating layers and electrically conductive layers. A first portion of a neighboring pair of memory sub-blocks is laterally spaced from each other along a first horizontal direction by a backside contact via structure. A subset of the alternating layers contiguously extends between a second portion of the neighboring pair of memory sub-blocks through a gap in a bridge region between two portions of the backside contact via structure that are laterally spaced apart along a second horizontal direction to provide a connecting portion between the neighboring pair of memory sub-blocks.

Abstract: A method of manufacturing a semiconductor structure includes forming a stack of alternating layers comprising insulating layers and spacer material layers over a semiconductor substrate, forming a memory opening through the stack, forming an aluminum oxide layer having a horizontal portion at a bottom of the memory opening and a vertical portion at least over a sidewall of the memory opening, where the horizontal portion differs from the vertical portion by at least one of structure or composition, and selectively etching the horizontal portion selective to the vertical portion.

Abstract: A method of forming a device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, and forming an aluminum oxide layer on sidewall surfaces of the sacrificial material layers and on sidewall surfaces of the insulating layers around the memory opening. First aluminum oxide portions of the aluminum oxide layer are located on sidewall surfaces of the sacrificial material layers, and second aluminum oxide portions of the aluminum oxide layer are located on sidewalls of the insulating layers. The method also includes removing the second aluminum oxide portions at a greater etch rate than the first aluminum oxide portions employing a selective etch process, such that all or a predominant portion of each first aluminum oxide portion remains after removal of the second aluminum oxide portions.

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory stack structures and a backside trench are formed through the alternating stack. Backside recesses are formed by removing the sacrificial material layers through the backside trench selective to the insulating layers. A cobalt portion is formed in each backside recess. A cobalt-semiconductor alloy portion can be formed on each cobalt portion by depositing a semiconductor material layer on the cobalt portions and reacting the semiconductor material with surface regions of the cobalt portions. A residual portion of the cobalt-semiconductor alloy formed above the alternating stack can be removed by an anisotropic etch or by a planarization process. A combination of a cobalt portion and a cobalt-semiconductor alloy portion within each backside recess can be employed as a word line of a three-dimensional memory device.

Abstract: Methods of making monolithic three-dimensional memory devices include performing a first etch to form a memory opening and a second etch using a different etching process to remove a damaged portion of the semiconductor substrate from the bottom of the memory opening. A single crystal semiconductor material is formed over the substrate in the memory opening using an epitaxial growth process. Additional embodiments include improving the quality of the interface between the semiconductor channel material and the underlying semiconductor layers in the memory opening which may be damaged by the bottom opening etch, including forming single crystal semiconductor channel material by epitaxial growth from the bottom surface of the memory opening and/or oxidizing surfaces exposed to the bottom opening etch and removing the oxidized surfaces prior to forming the channel material. Monolithic three-dimensional memory devices formed by the embodiment methods are also disclosed.

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. A dielectric collar structure can be formed prior to formation of an epitaxial channel portion, and can be employed to protect the epitaxial channel portion during replacement of the sacrificial material layers with electrically conductive layers. Exposure of the epitaxial channel portion to an etchant during removal of the sacrificial material layers is avoided through use of the dielectric collar structure. Additionally or alternatively, facets on the top surface of the epitaxial channel portion can be reduced or eliminated by forming the epitaxial channel portion to a height that exceeds a target height, and by recessing a top portion of the epitaxial channel portion. The recess etch can remove protruding portions of the epitaxial channel portion at a greater removal rate than a non-protruding portion.

Abstract: A method of forming a device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, and forming an aluminum oxide layer on sidewall surfaces of the sacrificial material layers and on sidewall surfaces of the insulating layers around the memory opening. First aluminum oxide portions of the aluminum oxide layer are located on sidewall surfaces of the sacrificial material layers, and second aluminum oxide portions of the aluminum oxide layer are located on sidewalls of the insulating layers. The method also includes removing the second aluminum oxide portions at a greater etch rate than the first aluminum oxide portions employing a selective etch process, such that all or a predominant portion of each first aluminum oxide portion remains after removal of the second aluminum oxide portions.

Abstract: A method of manufacturing a semiconductor structure includes forming a stack of alternating layers comprising insulating layers and spacer material layers over a semiconductor substrate, forming a memory opening through the stack, forming an aluminum oxide layer having a horizontal portion at a bottom of the memory opening and a vertical portion at least over a sidewall of the memory opening, where the horizontal portion differs from the vertical portion by at least one of structure or composition, and selectively etching the horizontal portion selective to the vertical portion.

Abstract: An alternating stack of insulating layers and sacrificial material layers can be formed over a substrate. Memory stack structures and a backside trench are formed through the alternating stack. Backside recesses are formed by removing the sacrificial material layers from the backside trench selective to the insulating layers. A cobalt-semiconductor alloy portion is formed in each backside recess by reacting cobalt and a semiconductor material. Conductive material in the backside trench can be removed by an etch to electrically isolate cobalt-containing alloy portions located in different backside recesses. Electrically conductive layers including a respective cobalt-semiconductor alloy portion can be employed as word lines of a three-dimensional memory device.

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory stack structures and a backside trench are formed through the alternating stack. Backside recesses are formed by removing the sacrificial material layers through the backside trench selective to the insulating layers. A cobalt portion is formed in each backside recess. A cobalt-semiconductor alloy portion can be formed on each cobalt portion by depositing a semiconductor material layer on the cobalt portions and reacting the semiconductor material with surface regions of the cobalt portions. A residual portion of the cobalt-semiconductor alloy formed above the alternating stack can be removed by an anisotropic etch or by a planarization process. A combination of a cobalt portion and a cobalt-semiconductor alloy portion within each backside recess can be employed as a word line of a three-dimensional memory device.

Abstract: An alternating stack of insulating layers and sacrificial material layers can be formed over a substrate. Memory stack structures and a backside trench are formed through the alternating stack. Backside recesses are formed by removing the sacrificial material layers from the backside trench selective to the insulating layers. A cobalt-containing material is deposited such that the cobalt-containing material continuously extends at least between a neighboring pair of cobalt-containing material portions in respective backside recesses. An anneal is performed at an elevated temperature to migrate vertically-extending portions of the cobalt-containing material into the backside recesses, thereby forming vertically separated cobalt-containing material portions confined within the backside recesses. Sidewalls of the insulating layers may be rounded or tapered to facilitate migration of the cobalt-containing material.