Patents by Inventor Satoe Miyata

Satoe Miyata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220359584
    Abstract: A photodetector including a plurality of photoelectric conversion sections that is provided to a semiconductor substrate. The photoelectric conversion sections each include a first region of a first electrical conduction type that is provided on a first surface side of the semiconductor substrate, a second region of a second electrical conduction type that is provided on a second surface side of the semiconductor substrate opposite to the first surface, a third region of a third electrical conduction type that is provided in a region between the first region and the second region of the semiconductor substrate, a first electrode that is electrically coupled to the first region from the first surface side, and a second electrode that is electrically coupled to the second region from the second surface side. The third region absorbs incident light.
    Type: Application
    Filed: March 30, 2020
    Publication date: November 10, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takahiro HAMASAKI, Koji NAGAHIRO, Hiroyuki OHRI, Satoe MIYATA, Takahiro MIURA, Hisao YOSHIMURA
  • Publication number: 20220278141
    Abstract: A photodetector according to an embodiment of the present disclosure including a plurality of photoelectric conversion sections that is provided to a semiconductor substrate. The photoelectric conversion sections each include a first region of a first electrical conduction type that is provided on a first surface side of the semiconductor substrate, a second region of a second electrical conduction type that is provided on a second surface side of the semiconductor substrate opposite to the first surface, a third region of a third electrical conduction type that is provided in a region between the first region and the second region of the semiconductor substrate, a first electrode that extends from the second surface in a thickness direction of the semiconductor substrate, a pixel separation layer having an insulation property, and a second electrode that is electrically coupled to the second region from the second surface side. The third region absorbs incident light.
    Type: Application
    Filed: March 30, 2020
    Publication date: September 1, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takahiro HAMASAKI, Hiroyuki TAKASHINO, Koji NAGAHIRO, Hiroyuki OHRI, Satoe MIYATA, Takahiro MIURA, Hisao YOSHIMURA
  • Publication number: 20220271072
    Abstract: Provided are a solid-state image pickup device capable of improving heat dissipation property, and an electronic apparatus including the solid-state image pickup device. A solid-state image pickup device according to the present technology includes: at least one photoelectric converter formed in a semiconductor substrate; and a thermal conductive layer that is arranged on one surface side and/or another surface side of the semiconductor substrate and includes a material having a thermal conductivity higher than that of SiO2. In the solid-state image pickup device according to the present technology, the heat generated, for example, in the at least one photoelectric converter is conveyed to the thermal conductive layer. At least a part of the heat transferred to the thermal conductive layer moves toward the end surface of the thermal conductive layer along the thermal conductive layer in the thermal conductive layer and is released from the end surface to the outside.
    Type: Application
    Filed: June 19, 2020
    Publication date: August 25, 2022
    Inventor: SATOE MIYATA
  • Publication number: 20210335860
    Abstract: The present technology relates to an image pickup device and an electronic apparatus that are configured to enhance characteristics. A solid-state image pickup device includes a photoelectric conversion section that is arranged on a semiconductor substrate and configured to photoelectrically convert an incident light, a moth-eye section that includes recesses and projections formed on a surface on a light incident side in the semiconductor substrate and has, when a cross section approximately parallel to a direction toward the photoelectric conversion section from the light incident side is viewed, a recessed portion protruding toward the side of the photoelectric conversion section, the recessed portion having a curvature or a polygonal shape, and a region that is arranged adjacent to and opposite to the photoelectric conversion section of the moth-eye section and has a refractive index different from a refractive index of the semiconductor substrate.
    Type: Application
    Filed: July 7, 2021
    Publication date: October 28, 2021
    Applicant: SONY GROUP CORPORATION
    Inventors: Satoe MIYATA, Itaru OSHIYAMA
  • Patent number: 11094728
    Abstract: The present technology relates to an image pickup device and an electronic apparatus that are configured to enhance characteristics. A solid-state image pickup device includes a photoelectric conversion section that is arranged on a semiconductor substrate and configured to photoelectrically convert an incident light, a moth-eye section that includes recesses and projections formed on a surface on a light incident side in the semiconductor substrate and has, when a cross section approximately parallel to a direction toward the photoelectric conversion section from the light incident side is viewed, a recessed portion protruding toward the side of the photoelectric conversion section, the recessed portion having a curvature or a polygonal shape, and a region that is arranged adjacent to and opposite to the photoelectric conversion section of the moth-eye section and has a refractive index different from a refractive index of the semiconductor substrate.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: August 17, 2021
    Assignee: SONY CORPORATION
    Inventors: Satoe Miyata, Itaru Oshiyama
  • Patent number: 10727261
    Abstract: The present technology relates to an image pickup device and an electronic apparatus that are configured to enhance characteristics. A solid-state image pickup device includes a photoelectric conversion section that is arranged on a semiconductor substrate and configured to photoelectrically convert an incident light, a moth-eye section that includes recesses and projections formed on a surface on a light incident side in the semiconductor substrate and has, when a cross section approximately parallel to a direction toward the photoelectric conversion section from the light incident side is viewed, a recessed portion protruding toward the side of the photoelectric conversion section, the recessed portion having a curvature or a polygonal shape, and a region that is arranged adjacent to and opposite to the photoelectric conversion section of the moth-eye section and has a refractive index different from a refractive index of the semiconductor substrate.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: July 28, 2020
    Assignee: Sony Corporation
    Inventors: Satoe Miyata, Itaru Oshiyama
  • Publication number: 20190252424
    Abstract: The present technology relates to an image pickup device and an electronic apparatus that are configured to enhance characteristics. A solid-state image pickup device includes a photoelectric conversion section that is arranged on a semiconductor substrate and configured to photoelectrically convert an incident light, a moth-eye section that includes recesses and projections formed on a surface on a light incident side in the semiconductor substrate and has, when a cross section approximately parallel to a direction toward the photoelectric conversion section from the light incident side is viewed, a recessed portion protruding toward the side of the photoelectric conversion section, the recessed portion having a curvature or a polygonal shape, and a region that is arranged adjacent to and opposite to the photoelectric conversion section of the moth-eye section and has a refractive index different from a refractive index of the semiconductor substrate.
    Type: Application
    Filed: April 22, 2019
    Publication date: August 15, 2019
    Applicant: SONY CORPORATION
    Inventors: Satoe MIYATA, Itaru OSHIYAMA
  • Patent number: 10340298
    Abstract: The present disclosure relates to a semiconductor device and an electronic apparatus capable of reducing a leak current of a PN junction region. In a Si substrate, an N+ region is formed in a P-type Well (P_Well region). A depletion layer is formed in the circumference of a boundary (metallurgic boundary of a PN junction) between the P_Well region and the N+ region. On the surface of the Si substrate, a fixed charge layer having positive fixed charge is formed on the N+ region to be spanned to the depletion layer. The present disclosure is applicable to a CMOS solid-state imaging device used in an imaging apparatus such as a camera.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: July 2, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Shinya Yamakawa, Satoe Miyata
  • Publication number: 20190027518
    Abstract: The present technology relates to an image pickup device and an electronic apparatus that are configured to enhance characteristics. A solid-state image pickup device includes a photoelectric conversion section that is arranged on a semiconductor substrate and configured to photoelectrically convert an incident light, a moth-eye section that includes recesses and projections formed on a surface on a light incident side in the semiconductor substrate and has, when a cross section approximately parallel to a direction toward the photoelectric conversion section from the light incident side is viewed, a recessed portion protruding toward the side of the photoelectric conversion section, the recessed portion having a curvature or a polygonal shape, and a region that is arranged adjacent to and opposite to the photoelectric conversion section of the moth-eye section and has a refractive index different from a refractive index of the semiconductor substrate.
    Type: Application
    Filed: January 6, 2017
    Publication date: January 24, 2019
    Applicant: SONY CORPORATION
    Inventors: Satoe MIYATA, Itaru OSHIYAMA
  • Publication number: 20170141144
    Abstract: The present disclosure relates to a semiconductor device and an electronic apparatus capable of reducing a leak current of a PN junction region. In a Si substrate, an N+ region is formed in a P-type Well (P_Well region). A depletion layer is formed in the circumference of a boundary (metallurgic boundary of a PN junction) between the P_Well region and the N+ region. On the surface of the Si substrate, a fixed charge layer having positive fixed charge is formed on the N+ region to be spanned to the depletion layer. The present disclosure is applicable to a CMOS solid-state imaging device used in an imaging apparatus such as a camera.
    Type: Application
    Filed: July 1, 2015
    Publication date: May 18, 2017
    Inventors: Shinya YAMAKAWA, Satoe MIYATA
  • Patent number: 8773559
    Abstract: A solid-state imaging device includes: a semiconductor substrate; and a plurality of pixels arrayed two-dimensionally in the semiconductor substrate, each of the pixels having a photoelectric conversion element that performs photoelectric conversion, the photoelectric conversion element having a first impurity region, formed in the semiconductor substrate, containing an impurity of a first conductivity type; a second impurity region formed in the semiconductor substrate so as to be in contact with the first impurity region, containing an impurity of a second conductivity type different from the first conductivity type; and a PN junction portion in which the first impurity region and the second impurity region are in contact with each other, formed in a protruding shape projecting toward a surface side of the semiconductor substrate.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: July 8, 2014
    Assignee: Sony Corporation
    Inventor: Satoe Miyata
  • Publication number: 20130126952
    Abstract: A solid-state imaging device includes: a semiconductor substrate; and a plurality of pixels arrayed two-dimensionally in the semiconductor substrate, each of the pixels having a photoelectric conversion element that performs photoelectric conversion, the photoelectric conversion element having a first impurity region, formed in the semiconductor substrate, containing an impurity of a first conductivity type; a second impurity region formed in the semiconductor substrate so as to be in contact with the first impurity region, containing an impurity of a second conductivity type different from the first conductivity type; and a PN junction portion in which the first impurity region and the second impurity region are in contact with each other, formed in a protruding shape projecting toward a surface side of the semiconductor substrate.
    Type: Application
    Filed: January 16, 2013
    Publication date: May 23, 2013
    Applicant: SONY CORPORATION
    Inventor: Satoe MIYATA
  • Patent number: 8384809
    Abstract: A solid-state imaging device includes: a semiconductor substrate; and a plurality of pixels arrayed two-dimensionally in the semiconductor substrate, each of the pixels having a photoelectric conversion element that performs photoelectric conversion, the photoelectric conversion element having a first impurity region, formed in the semiconductor substrate, containing an impurity of a first conductivity type; a second impurity region formed in the semiconductor substrate so as to be in contact with the first impurity region, containing an impurity of a second conductivity type different from the first conductivity type; and a PN junction portion in which the first impurity region and the second impurity region are in contact with each other, formed in a protruding shape projecting toward a surface side of the semiconductor substrate.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: February 26, 2013
    Assignee: Sony Corporation
    Inventor: Satoe Miyata
  • Publication number: 20100103299
    Abstract: A solid-state imaging device includes: a semiconductor substrate; and a plurality of pixels arrayed two-dimensionally in the semiconductor substrate, each of the pixels having a photoelectric conversion element that performs photoelectric conversion, the photoelectric conversion element having a first impurity region, formed in the semiconductor substrate, containing an impurity of a first conductivity type; a second impurity region formed in the semiconductor substrate so as to be in contact with the first impurity region, containing an impurity of a second conductivity type different from the first conductivity type; and a PN junction portion in which the first impurity region and the second impurity region are in contact with each other, formed in a protruding shape projecting toward a surface side of the semiconductor substrate.
    Type: Application
    Filed: October 19, 2009
    Publication date: April 29, 2010
    Applicant: SONY CORPORATION
    Inventor: Satoe MIYATA
  • Patent number: 7626229
    Abstract: A semiconductor device includes: a semiconductor substrate; a first semiconductor region formed in the reverse surface region of the semiconductor substrate and including a first conductivity type impurity; a second semiconductor region formed on the first semiconductor region in the semiconductor substrate and including a second conductivity type impurity; a third semiconductor region formed on the second semiconductor region in the semiconductor substrate and including a first conductivity type impurity; a trench passing through the second and third semiconductor regions and reaching the first semiconductor region; and a gate insulating film formed along the wall face of the trench; a gate electrode formed on the gate insulating film in the trench. Further, a pocket region including a second conductivity type impurity of which peak concentration is higher than that of the second semiconductor region is formed by a side of the trench between the second semiconductor region and the third semiconductor region.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: December 1, 2009
    Assignee: Panasonic Corporation
    Inventors: Satoe Miyata, Shuji Mizokuchi
  • Patent number: 7372088
    Abstract: A source region is formed by performing ion implantation plural times to diffuse an impurity from the upper surface of a semiconductor region toward a region far dawn therefrom and to increase impurity concentration in the vicinity of the upper surface of the semiconductor region, whereby the source region and a gate electrode are overlapped with each other surely. Thus, offset between the gate and the source is prevented and an excellent ohmic contact is formed between a source electrode and the source region.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: May 13, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoe Miyata, Shuji Mizokuchi
  • Patent number: 7271441
    Abstract: The semiconductor device includes a first semiconductor region of a first conductivity type partially extending to a top face of a semiconductor substrate; a second semiconductor region of a second conductivity type formed on the first semiconductor region; a third semiconductor region of the first conductivity type formed on the second semiconductor region; a fourth semiconductor region of the second conductivity type formed on the second semiconductor region and adjacent to the third semiconductor region; a trench penetrating through the second semiconductor region and the third semiconductor region; a gate insulating film formed on an inner wall of the trench; and a gate electrode formed on the gate insulating film within the trench.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: September 18, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoe Miyata, Shuji Mizokuchi
  • Publication number: 20060160310
    Abstract: After forming a first semiconductor region of a first conductivity type in a semiconductor substrate, a trench reaching a given portion of the first semiconductor region is formed in the semiconductor substrate. Then, after forming a gate insulating film on an inner wall of the trench, a second semiconductor region of a second conductivity type is formed on the first semiconductor region in the semiconductor substrate, and thereafter, a third semiconductor region of the first conductivity type is formed on the second semiconductor region in the semiconductor substrate. Also, a gate electrode of the first conductivity type is formed on the gate insulating film within the trench. The gate electrode is formed on the gate insulating film so as to extend over the second semiconductor region, a portion of the first semiconductor region disposed below the second semiconductor region and a portion of the third semiconductor region disposed on the second semiconductor region.
    Type: Application
    Filed: October 31, 2005
    Publication date: July 20, 2006
    Inventors: Satoe Miyata, Shuji Mizokuchi
  • Publication number: 20060157780
    Abstract: The semiconductor device includes a first semiconductor region of a first conductivity type partially extending to a top face of a semiconductor substrate; a second semiconductor region of a second conductivity type formed on the first semiconductor region; a third semiconductor region of the first conductivity type formed on the second semiconductor region; a fourth semiconductor region of the second conductivity type formed on the second semiconductor region and adjacent to the third semiconductor region; a trench penetrating through the second semiconductor region and the third semiconductor region; a gate insulating film formed on an inner wall of the trench; and a gate electrode formed on the gate insulating film within the trench.
    Type: Application
    Filed: October 31, 2005
    Publication date: July 20, 2006
    Inventors: Satoe Miyata, Shuji Mizokuchi
  • Publication number: 20050179082
    Abstract: A semiconductor device includes: a semiconductor substrate; a first semiconductor region formed in the reverse surface region of the semiconductor substrate and including a first conductivity type impurity; a second semiconductor region formed on the first semiconductor region in the semiconductor substrate and including a second conductivity type impurity; a third semiconductor region formed on the second semiconductor region in the semiconductor substrate and including a first conductivity type impurity; a trench passing through the second and third semiconductor regions and reaching the first semiconductor region; and a gate insulating film formed along the wall face of the trench; a gate electrode formed on the gate insulating film in the trench. Further, a pocket region including a second conductivity type impurity of which peak concentration is higher than that of the second semiconductor region is formed by a side of the trench between the second semiconductor region and the third semiconductor region.
    Type: Application
    Filed: January 10, 2005
    Publication date: August 18, 2005
    Inventors: Satoe Miyata, Shuji Mizokuchi