Patents by Inventor Satoru Shimada

Satoru Shimada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162780
    Abstract: A fluid machine includes an electric motor, an inverter, a housing, a cover member that is fixed to the housing and defines an accommodation chamber, a sealing member that is disposed between the cover member and the housing, and a fastening member that is fastened to the housing. The housing has an insertion hole. The fastening member has a shank inserted into the insertion hole, a flange applying a fastening force to the cover member through a rubber washer, and a positioning portion defining positions of the shank and the flange relative to the housing. The cover member is supported on the housing. Stiffness of the rubber washer is greater than stiffness of the sealing member.
    Type: Application
    Filed: February 24, 2022
    Publication date: May 16, 2024
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shuto ONITSUKA, Akihiro MURANISHI, Yosuke INAGAKI, Satoru SHIMADA
  • Patent number: 11924985
    Abstract: A display device includes a display panel that includes a first hole and a device housing that is configured such that the display panel is fastened and fixed to the device housing by a screw passed through the first hole and screwed into the screw hole. The display panel includes a display-side positioning part which is configured to fit to a portion of the device housing to perform positioning of the display panel with respect to the device housing and which includes the first hole, and the device housing includes a housing-side positioning part which is configured to fit to the display-side positioning part to perform the positioning and which includes a second hole formed so as to communicate with the first hole when the housing-side positioning part is fitted to the display-side positioning part.
    Type: Grant
    Filed: October 6, 2022
    Date of Patent: March 5, 2024
    Assignee: YAZAKI CORPORATION
    Inventors: Junichi Ikumi, Masaaki Sano, Naoki Ueno, Akira Masuda, Takahiro Shimada, Takeshi Iwamoto, Shota Kosuga, Ryuta Suzuki, Satoru Kanazawa, Junnosuke Nishimura
  • Patent number: 11180293
    Abstract: A synthetic resin container lid (2) has a shape including a body (4), which is mounted on a mouth-neck portion (56) of a container by locking a locking means (26) to a locked means (58) of the mouth-neck portion (56), and an upper lid (6) coupled to the body (4) via a hinge means (32). The synthetic resin container lid (2) is improved so that the entire container lid (2) is fully and easily detached from the mouth-neck portion of the container. The axial depth of an annular or arcuate groove (46) formed in a hanging wall (10) of the body (4) and extending in a circumferential direction is changed as required. At least in a second break region (B) and a third break region (C), a circumferential breakable line (53) extending continuously in the circumferential direction along an axially lower end part of the groove (46) is formed in the hanging wall (10).
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: November 23, 2021
    Assignee: NIPPON CLOSURES CO., LTD.
    Inventors: Toru Sahara, Satoru Shimada, Takashi Sugiyama
  • Patent number: 11180288
    Abstract: A container lid (2) can be removed from a mouth-neck section (106) of a container without the need for a tool. Following the breakage of a breakable thin-walled line (70) in a transition region (52), the breakage of a breakable thin-walled connection wall (68) in a side wall separation region (54) can be started sufficiently smoothly in the container lid (2). For this purpose, the breakable thin-walled line (70) formed in a side wall (10) in the transition region (52) is brought into a form in which at least a part thereof extends obliquely downwardly in a counterclockwise direction.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: November 23, 2021
    Assignee: NIPPON CLOSURES CO., LTD.
    Inventors: Satoru Shimada, Hiroaki Hayashi, Takashi Sugiyama, Jun Wakishima, Go Oota, Yusuke Tani
  • Publication number: 20200385178
    Abstract: A container lid (2) can be removed from a mouth-neck section (106) of a container without the need for a tool. Following the breakage of a breakable thin-walled line (70) in a transition region (52), the breakage of a breakable thin-walled connection wall (68) in a side wall separation region (54) can be started sufficiently smoothly in the container lid (2). For this purpose, the breakable thin-walled line (70) formed in a side wall (10) in the transition region (52) is brought into a form in which at least a part thereof extends obliquely downwardly in a counterclockwise direction.
    Type: Application
    Filed: February 1, 2018
    Publication date: December 10, 2020
    Applicant: NIPPON CLOSURES CO., LTD.
    Inventors: Satoru SHIMADA, Hiroaki HAYASHI, Takashi SUGIYAMA, Jun WAKISHIMA, Go OOTA, Yusuke TANI
  • Patent number: 10797186
    Abstract: A plurality of finger electrodes are disposed on a surface of a photoelectric conversion layer 60 and extend in a first direction. The plurality of finger electrodes are arranged in a second direction in which an inter-cell wiring member adapted to be disposed on the surface of the photoelectric conversion layer extends. A height of each of those of the plurality of finger electrodes disposed toward ends in the second direction from a part of the photoelectric conversion layer where the inter-cell wiring member is adapted to be disposed is larger than a height of the finger electrode disposed at a center in the second direction from the part of the photoelectric conversion layer where the inter-cell wiring member is adapted to be disposed.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: October 6, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shoji Sato, Mikio Taguchi, Satoru Shimada
  • Patent number: 10392520
    Abstract: Provided is a carbon nanotube (CNT) network which can improve an electrical joint so that a sufficient amount of current flows into a thin film and the amount of current is controlled. A network of CNT or a CNT hybrid material is constructed by distributing, as a node between CNT and CNT in a CNT thin film, a fine particle of an inorganic semiconductor and preferably fine particles of a metal halide, a metal oxide, or a metal sulfide.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: August 27, 2019
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Ying Zhou, Reiko Azumi, Satoru Shimada
  • Publication number: 20190185226
    Abstract: A synthetic resin container lid (2) has a shape including a body (4), which is mounted on a mouth-neck portion (56) of a container by locking a locking means (26) to a locked means (58) of the mouth-neck portion (56), and an upper lid (6) coupled to the body (4) via a hinge means (32). The synthetic resin container lid (2) is improved so that the entire container lid (2) is fully and easily detached from the mouth-neck portion of the container. The axial depth of an annular or arcuate groove (46) formed in a hanging wall (10) of the body (4) and extending in a circumferential direction is changed as required. At least in a second break region (B) and a third break region (C), a circumferential breakable line (53) extending continuously in the circumferential direction along an axially lower end part of the groove (46) is formed in the hanging wall (10).
    Type: Application
    Filed: September 28, 2017
    Publication date: June 20, 2019
    Applicant: NIPPON CLOSURES CO., LTD.
    Inventors: Toru SAHARA, Satoru SHIMADA, Takashi SUGIYAMA
  • Publication number: 20190157489
    Abstract: A solar cell according to one embodiment of the present invention is provided with: an n-type crystalline silicon wafer having an n+ layer in the entire wafer surface and in the vicinity thereof, said n+ layer having a higher n-type dopant concentration than the other regions; a low concentration P-containing silicon oxide layer which is formed on a light receiving surface of the n-type crystalline silicon wafer; an n-type crystalline silicon layer which is formed on the low concentration P-containing silicon oxide layer; and a p-type amorphous silicon layer which is formed on the back surface side of the n-type crystalline silicon wafer.
    Type: Application
    Filed: January 28, 2019
    Publication date: May 23, 2019
    Applicant: Panasonic Intellectual Property Management Co., Lt d.
    Inventors: Kenta Matsuyama, Kazunori Fujita, Satoru Shimada
  • Patent number: 10214324
    Abstract: A cap-type synthetic resin container lid is easily removable from a container without separating to form scrap pieces, The container lid includes thin-walled inversion pieces that extend upward beyond a top panel wall from their lower ends which connect to the outer surface of a skirt wall, a restraint wall that is connected to the upper ends of the thin-walled inversion pieces and that has a specific site in the circumferential direction, and an operating section connected to the outer surface of the skirt wall via a connecting piece that extends radially out from the skirt wall at a position in alignment with the specific site. Locked projections and locking projections, on the restraint wall and the connecting piece respectively, restrict expansion of the restraint wall.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: February 26, 2019
    Assignee: NIPPON CLOSURES CO., LTD.
    Inventors: Satoru Shimada, Masataka Iyadomi
  • Publication number: 20190035952
    Abstract: A plurality of finger electrodes are disposed on a surface of a photoelectric conversion layer 60 and extend in a first direction. The plurality of finger electrodes are arranged in a second direction in which an inter-cell wiring member adapted to be disposed on the surface of the photoelectric conversion layer extends. A height of each of those of the plurality of finger electrodes disposed toward ends in the second direction from a part of the photoelectric conversion layer where the inter-cell wiring member is adapted to be disposed is larger than a height of the finger electrode disposed at a center in the second direction from the part of the photoelectric conversion layer where the inter-cell wiring member is adapted to be disposed.
    Type: Application
    Filed: September 28, 2018
    Publication date: January 31, 2019
    Inventors: Shoji SATO, Mikio TAGUCHI, Satoru SHIMADA
  • Publication number: 20170305612
    Abstract: A cap-type synthetic resin container lid (2), which can be removed sufficiently easily from a mouth-neck section (38) of a container without requiring great force and, even after removal from the mouth-neck section (38) of the container, continues to be kept integral without being partly separated to form a scrap piece, is provided.
    Type: Application
    Filed: September 4, 2015
    Publication date: October 26, 2017
    Applicant: NIPPON CLOSURES CO., LTD.
    Inventors: Satoru SHIMADA, Masataka IYADOMI
  • Publication number: 20170226353
    Abstract: Provided is a carbon nanotube (CNT) network which can improve an electrical joint so that a sufficient amount of current flows into a thin film and the amount of current is controlled. A network of CNT or a CNT hybrid material is constructed by distributing, as a node between CNT and CNT in a CNT thin film, a fine particle of an inorganic semiconductor and preferably fine particles of a metal halide, a metal oxide, or a metal sulfide.
    Type: Application
    Filed: October 16, 2015
    Publication date: August 10, 2017
    Inventors: Ying ZHOU, Reiko AZUMI, Satoru SHIMADA
  • Patent number: 9362426
    Abstract: This photoelectric conversion device (10) is provided with: an n-type monocrystalline silicon substrate (21); an IN layer (25) and an IP layer (26) formed on the back surface of the n-type monocrystalline silicon substrate (21); an n-side electrode (40) containing an n-side underlayer (43), an n-side primary conductive layer (44), and an n-side protective layer (45); and a p-side electrode (50) containing a p-side underlayer (53), a p-side primary conductive layer (54), and a p-side protective layer (55). The n-side primary conductive layer (44) is formed in a manner so as not to cover the lateral surface of the n-side underlayer (43), and is covered at the lateral surface by the n-side protective layer (45). The p-side electrode (50) is formed in such a manner the lateral surface of the p-side underlayer (53) is not covered, and the lateral surface is covered by the p-side protective layer (55).
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: June 7, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Ryo Goto, Satoru Shimada, Masato Shigematsu, Hitoshi Sakata, Daisuke Ide
  • Publication number: 20150255644
    Abstract: A solar cell has a texture and is equipped with an electrode formed on the texture and including flakes in addition to conductive particulates, wherein an average value of the longest axis diameters of the flakes is larger than an average value of the distances between the vertices of the texture.
    Type: Application
    Filed: May 22, 2015
    Publication date: September 10, 2015
    Inventors: Yasuko HIRAYAMA, Kenta MATSUYAMA, Satoru SHIMADA
  • Publication number: 20140024168
    Abstract: This method for producing a photoelectric conversion device has: a step for forming each of an IN layer and an IP layer on one surface of an n-type monocrystalline silicon substrate; and a step of forming an n-side electrode and a p-side electrode, each including a plurality of conductor layers. Also, the step for forming the electrodes includes: a first step for forming a first conductive layer on the IN layer and the IP layer; a second step for forming a second conductive layer on the portion of the first conductive layer that covers the IN layer, and a second conductive layer on the portion of the first conductive layer that covers the IP layer; and a third step for forming a first conductive layer and a first conductive layer by partially etching the first conductive layer after completing the second step.
    Type: Application
    Filed: September 25, 2013
    Publication date: January 23, 2014
    Applicant: SANYO Electric Co., Ltd.
    Inventors: Ryo GOTO, Satoru SHIMADA, Masato SHIGEMATSU, Hitoshi SAKATA, Daisuke IDE
  • Publication number: 20140020753
    Abstract: This photoelectric conversion device (10) is provided with: an n-type monocrystalline silicon substrate (21); an IN layer (25) and an IP layer (26) formed on the back surface of the n-type monocrystalline silicon substrate (21); an n-side electrode (40) containing an n-side underlayer (43), an n-side primary conductive layer (44), and an n-side protective layer (45); and a p-side electrode (50) containing a p-side underlayer (53), a p-side primary conductive layer (54), and a p-side protective layer (55). The n-side primary conductive layer (44) is formed in a manner so as not to cover the lateral surface of the n-side underlayer (43), and is covered at the lateral surface by the n-side protective layer (45). The p-side electrode (50) is formed in such a manner the lateral surface of the p-side underlayer (53) is not covered, and the lateral surface is covered by the p-side protective layer (55).
    Type: Application
    Filed: September 20, 2013
    Publication date: January 23, 2014
    Applicant: SANYO Electric Co., Ltd.
    Inventors: Ryo GOTO, Satoru SHIMADA, Masato SHIGEMATSU, Hitoshi SAKATA, Daisuke IDE
  • Patent number: 8319281
    Abstract: A semiconductor device capable of inhibiting a fabricating process from complication while inhibiting the dielectric strength voltage of a insulating film from reduction is obtained. This semiconductor device includes a groove portion, an insulating film formed on a surface of the groove portion, a gate electrode and a source impurity region, wherein upper ends of the gate electrode, which are portions in contact with the insulating film, are each located at a position identical with or deeper than the range of an impurity introduced from a surface of a semiconductor substrate with respect to the insulating film in order to form the source impurity region and above a lower surface of the source impurity region.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: November 27, 2012
    Assignee: Sanyo Electric, Co., Ltd.
    Inventors: Yoshikazu Yamaoka, Satoru Shimada, Kazunori Fujita, Kazuhiro Sasada
  • Patent number: 8242557
    Abstract: The invention provides a trench gate type transistor in which the gate capacitance is reduced, the crystal defect is prevented and the gate breakdown voltage is enhanced. Trenches are formed in an N? type semiconductor layer. A uniformly thick silicon oxide film is formed on the bottom of each of the trenches and near the bottom, being round at corner portions. A silicon oxide film is formed on the upper portion of the sidewall of each of the trenches, which is thinner than the silicon oxide film and round at corner portions. Gate electrodes are formed from inside the trenches onto the outside thereof. The thick silicon oxide film reduces the gate capacitance, and the thin silicon oxide film on the upper portion provides good transistor characteristics. Furthermore, with the round corner portions, the crystal defect does not easily occur, and the gate electric field is dispersed to enhance the gate breakdown voltage.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: August 14, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Satoru Shimada, Yoshikazu Yamaoka, Kazunori Fujita, Tomonori Tabe
  • Patent number: 8110463
    Abstract: A method of fabricating a semiconductor device includes a first step of forming a defect suppression film suppressing increase in a defect due to implantation of an impurity on a semiconductor substrate, a second step of forming an active region on a surface of the semiconductor substrate by implanting the impurity through the defect suppression film, a third step of removing the defect suppression film and a fourth step of forming an interface state suppression film suppressing increase in an interface state density of the active region on the active region.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: February 7, 2012
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventors: Satoru Shimada, Yasuhiro Takeda, Seiji Otake