Patents by Inventor Satoshi Hatsukawa

Satoshi Hatsukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11736060
    Abstract: A photovoltaic apparatus includes: a concentrator photovoltaic panel; a driving device configured to change an attitude of the photovoltaic panel; a current detection unit configured to detect an output current of the photovoltaic panel; and a control unit configured to cause the driving device to perform a sun-tracking shift operation when it is determined based on a detection result of the current detection unit that the photovoltaic panel is generating no power during tracking of the sun.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: August 22, 2023
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Seiji Yamamoto, Rui Mikami, Satoshi Hatsukawa, Kenichi Hirotsu
  • Publication number: 20230037158
    Abstract: A semiconductor module includes a base member; a circuit board provided on the base member and including a positive electrode pad, a negative electrode pad, and semiconductor devices; a housing formed in a frame shape and attached to the base member; a first electrode plate electrically coupled to the positive electrode pad and having a first flat plate portion; a second electrode plate electrically coupled to the negative electrode pad and having a second flat plate portion; and a first insulating member. The first flat plate portion and the second flat plate portion are disposed in parallel from the inside to outside of the housing. The first flat plate portion has a first external connection terminal situated outside the housing, and the second flat plate portion has a second external connection terminal situated outside the housing. The first insulating member is sandwiched between the first and the second external connection terminals.
    Type: Application
    Filed: January 16, 2020
    Publication date: February 2, 2023
    Inventors: Christina LEGEN, Gerhard WOELFL, Hirotaka OOMORI, Masaki TANIYAMA, Satoshi HATSUKAWA, Takashi TSUNO
  • Patent number: 11495527
    Abstract: A semiconductor module includes a base member including a circuit board on which a positive electrode pad and a negative electrode pad are provided and on which a semiconductor device is mounted to be electrically coupled to the positive electrode pad and the negative electrode pad, a housing that is attached to the base member so as to surround the positive electrode pad and the negative electrode pad, the housing being formed in a frame shape, a first electrode plate that is electrically coupled to the positive electrode pad, the first electrode plate having a flat plate portion, and a second electrode plate that is electrically coupled to the negative electrode pad, the second electrode plate having a flat plate portion. The flat plate portion of the first electrode plate and the flat plate portion of the second electrode plate are arranged in a parallel-plate configuration within the housing.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: November 8, 2022
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hirotaka Oomori, Satoshi Hatsukawa, Takashi Tsuno
  • Publication number: 20210320055
    Abstract: A semiconductor module includes a base member including a circuit board on which a positive electrode pad and a negative electrode pad are provided and on which a semiconductor device is mounted to be electrically coupled to the positive electrode pad and the negative electrode pad, a housing that is attached to the base member so as to surround the positive electrode pad and the negative electrode pad, the housing being formed in a frame shape, a first electrode plate that is electrically coupled to the positive electrode pad, the first electrode plate having a flat plate portion, and a second electrode plate that is electrically coupled to the negative electrode pad, the second electrode plate having a flat plate portion. The flat plate portion of the first electrode plate and the flat plate portion of the second electrode plate are arranged in a parallel-plate configuration within the housing.
    Type: Application
    Filed: August 16, 2018
    Publication date: October 14, 2021
    Inventors: Hirotaka OOMORI, Satoshi HATSUKAWA, Takashi TSUNO
  • Publication number: 20210028743
    Abstract: A photovoltaic apparatus includes: a concentrator photovoltaic panel; a driving device configured to change an attitude of the photovoltaic panel; a current detection unit configured to detect an output current of the photovoltaic panel; and a control unit configured to cause the driving device to perform a sun-tracking shift operation when it is determined based on a detection result of the current detection unit that the photovoltaic panel is generating no power during tracking of the sun.
    Type: Application
    Filed: January 23, 2019
    Publication date: January 28, 2021
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Seiji YAMAMOTO, Rui MIKAMI, Satoshi HATSUKAWA, Kenichi HIROTSU
  • Patent number: 10116197
    Abstract: A front stage circuit of a transformer includes a switch series unit, capacitors, and a ground electrical path. The switch series unit, connected in parallel to a power supply, includes odd-numbered/even-numbered switches configured to be alternately turned ON. Assuming that mutual connection points of the switches and points at both ends of the switch series unit are m nodes in total, and one of the points at the both ends is a ground node, the capacitors are provided on at least one of a first electrical path that combines odd nodes and leads them to a first output port, and a second electrical path that combines even nodes and leads them to a second output port, and the capacitors are present to correspond to (m?1) nodes excluding the ground node. The ground electrical path connects the ground node directly to the first output port without an interposed capacitor.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: October 30, 2018
    Assignees: Sumitomo Electric Industries, Ltd., National University Corporation Toyohashi University of Technology
    Inventors: Hideaki Nakahata, Satoshi Hatsukawa, Kenichi Hirotsu, Takashi Ohira, Kyohei Yamada, Daiya Egashira
  • Publication number: 20170294829
    Abstract: A front stage circuit of a transformer includes a switch series unit, capacitors, and a ground electrical path. The switch series unit, connected in parallel to a power supply, includes odd-numbered/even-numbered switches configured to be alternately turned ON. Assuming that mutual connection points of the switches and points at both ends of the switch series unit are m nodes in total, and one of the points at the both ends is a ground node, the capacitors are provided on at least one of a first electrical path that combines odd nodes and leads them to a first output port, and a second electrical path that combines even nodes and leads them to a second output port, and the capacitors are present to correspond to (m?1) nodes excluding the ground node. The ground electrical path connects the ground node directly to the first output port without an interposed capacitor.
    Type: Application
    Filed: October 9, 2015
    Publication date: October 12, 2017
    Applicants: Sumitomo Electric Industries, Ltd., NATIONAL UNIVERSITY CORPORATION TOYOHASHI UNIVERSITY OF TECHNOLOGY, NATIONAL UNIVERSITY CORPORATION TOYOHASHI UNIVERSITY OF TECHNOLOGY
    Inventors: Hideaki Nakahata, Satoshi Hatsukawa, Kenichi Hirotsu, Takashi Ohira, Kyohei Yamada, Daiya Egashira
  • Patent number: 9154052
    Abstract: A power inverter circuit 1 is a bridge power inverter circuit comprising first and second switching elements 11, 12 sequentially connected in series between input terminals on higher and lower voltage sides and third and fourth switching elements 13, 14 sequentially connected in series between the input terminals on the higher and lower voltage sides and alternately turning on a set of the first and fourth switching elements 11, 14 and a set of the second and third switching elements 12, 14 so as to convert a DC power fed between the input terminals on the higher and lower voltage sides into an AC power. One of the sets of the first and third switching elements 11, 13 and the second and fourth switching elements 12, 14 is subjected to switching control at a frequency higher than that of the other.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: October 6, 2015
    Assignees: Sumitomo Electric Industries, Ltd., National University Corporation TOYOHASHI UNIVERSITY OF TECHNOLOGY
    Inventors: Kazuhiro Fujikawa, Satoshi Hatsukawa, Nobuo Shiga, Takashi Ohira
  • Patent number: 9136911
    Abstract: To realize a transmission function of power line communication by a further simplified and cost-effective circuit configuration, in a PLC modem installed in an electric appliance such as a household electrical appliance. A semiconductor switching element that is present on an electric circuit connected to a power line is driven by a modulator unit. The modulator unit controls ON/OFF operations of the semiconductor switching element, to thereby cause a communication signal of a modulated rectangular wave to be output to the power line for a prescribed period.
    Type: Grant
    Filed: August 4, 2010
    Date of Patent: September 15, 2015
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., KYOTO UNIVERSITY
    Inventors: Takashi Hikihara, Tsuguhiro Takuno, Kenichi Hirotsu, Takefumi Shimoguchi, Toshikazu Shibata, Takashi Tsuno, Satoshi Hatsukawa
  • Patent number: 8928002
    Abstract: To provide a semiconductor device which allows a plurality of semiconductor chips to let a current flow uniformly therethrough and a method of manufacturing the same. The semiconductor device in accordance with one embodiment comprises a plurality of first semiconductor chips and a circuit board, mounted with the plurality of the first semiconductor chips, having first and second wiring conductors electrically connected to the plurality of first semiconductor chips. The plurality of first semiconductor chips are connected in parallel together with the first and second wiring conductors so as to construct a first parallel circuit. The plurality of first semiconductor chips are arranged on the circuit board according to an on-resistance of the plurality of first semiconductor chips so that a uniform current flows through the plurality of first semiconductor chips.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: January 6, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Satoshi Hatsukawa
  • Patent number: 8917142
    Abstract: A switching circuit 33 comprises a connection circuit cascade-connecting control terminals for controlling switching of n number of transistors M1-Mn via n?1 number of coils L1 respectively (n is an integer equal to or more than 2; and coils L3 respectively connected between one end of each of the transistors M1-Mn and other end of a coil L2, one end of the coil L2 being electrically connected to a DC power source. The transistors M1-Mn is sequentially switched with PWM signals inputted to an input terminal of the connection circuit. The switching circuit 33 further comprises a transistor M0 inserted at the one end or the other end of the coil L2 in cascade-connection.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: December 23, 2014
    Assignees: Sumitomo Electric Industries, Ltd., National University Corporation Toyohashi University of Technology
    Inventors: Satoshi Hatsukawa, Kazuhiro Fujikawa, Takashi Tsuno, Nobuo Shiga, Takashi Ohira, Kazuyuki Wada, Tuya Wuren, Kotaro Tanimura
  • Patent number: 8878604
    Abstract: A switching circuit according to one embodiment has: N switching elements; a connection circuit including N?1 first inductance elements that are connected in series; a second inductance element; and N third inductance elements. Control terminals of the N switching elements are connected to ends of the connection circuit and connection contacts, respectively. One end of the second inductance element is connected to a power supply. The N third inductance elements electrically connects one ends of the N switching elements and the other end of the second inductance element with each other, respectively.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: November 4, 2014
    Assignees: Sumitomo Electric Industries, Ltd., National University Corporation Toyohashi University of Technology
    Inventors: Takashi Ohira, Kazuyuki Wada, Mitsutoshi Nakata, Kazushi Sawada, Satoshi Hatsukawa, Nobuo Shiga, Kazuhiro Fujikawa
  • Publication number: 20140001482
    Abstract: To provide a semiconductor device which allows a plurality of semiconductor chips to let a current flow uniformly therethrough and a method of manufacturing the same. The semiconductor device in accordance with one embodiment comprises a plurality of first semiconductor chips and a circuit board, mounted with the plurality of the first semiconductor chips, having first and second wiring conductors electrically connected to the plurality of first semiconductor chips. The plurality of first semiconductor chips are connected in parallel together with the first and second wiring conductors so as to construct a first parallel circuit. The plurality of first semiconductor chips are arranged on the circuit board according to an on-resistance of the plurality of first semiconductor chips so that a uniform current flows through the plurality of first semiconductor chips.
    Type: Application
    Filed: May 24, 2013
    Publication date: January 2, 2014
    Inventor: Satoshi Hatsukawa
  • Publication number: 20130279229
    Abstract: A power inverter circuit 1 is a bridge power inverter circuit comprising first and second switching elements 11, 12 sequentially connected in series between input terminals on higher and lower voltage sides and third and fourth switching elements 13, 14 sequentially connected in series between the input terminals on the higher and lower voltage sides and alternately turning on a set of the first and fourth switching elements 11, 14 and a set of the second and third switching elements 12, 14 so as to convert a DC power fed between the input terminals on the higher and lower voltage sides into an AC power. One of the sets of the first and third switching elements 11, 13 and the second and fourth switching elements 12, 14 is subjected to switching control at a frequency higher than that of the other.
    Type: Application
    Filed: March 28, 2013
    Publication date: October 24, 2013
    Applicants: National University Corporation TOYOHASHI UNIVERSITY OF TECHNOLOGY, Sumitomo Electric Industries, Ltd.
    Inventors: Kazuhiro Fujikawa, Satoshi Hatsukawa, Nobuo Shiga, Takashi Ohira
  • Patent number: 8551864
    Abstract: A method of manufacturing a semiconductor device comprises the steps of forming a film on a main face of a semiconductor substrate having a plurality of device forming regions for forming semiconductor devices, the film having a coefficient of thermal expansion different from that of the semiconductor substrate and including a cutout on a region between the plurality of device forming regions; forming the semiconductor devices in the respective device forming regions by using the film; and dividing the semiconductor substrate into the respective device forming regions.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: October 8, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Satoshi Hatsukawa
  • Patent number: 8536930
    Abstract: A switching circuit according to one embodiment includes: a switching element that has a first terminal and a second terminal, and is driven by a pulse signal to switch a conduction state between the first and second terminals; a power source section that supplies a voltage to the first terminal; a load circuit that is connected in parallel with the power source section; a passive circuit section that is connected between a connection point between the power source section and the load circuit, and the first terminal, and suppresses a current flowing from the connection point to the switching element at a frequency N times (N is an integer of 1 or more) as high as a clock frequency of the pulse signal; and a resonant circuit section that is connected between the passive circuit section and the connection point, and resonates at the frequency of N times.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: September 17, 2013
    Assignees: Sumitomo Electric Industries, Ltd., National University Corporation Toyohashi University of Technology
    Inventors: Satoshi Hatsukawa, Nobuo Shiga, Kazuhiro Fujikawa, Takashi Ohira, Kazuyuki Wada, Tuya Wuren, Kazushi Sawada, Hiroshi Ishioka
  • Publication number: 20130089936
    Abstract: A plurality of SiC semiconductor chips are mounted on a mounting substrate (S1), and a voltage is applied to the SiC semiconductor chips on the mounting substrate (S2). In the state in which the voltage is applied, thermography, infrared microscope, or another thermal imaging device is used to acquire a temperature distribution image of the surface of the mounting substrate (S3), and by conducting image analysis, the presence of a defective chip is determined (S5). If a defective chip is included on the mounting substrate (“YES” in S5), wiring of the defective chip is severed to exclude the defective chip (S7). By this means, a method for manufacturing a semiconductor device using small-capacity chips is provided.
    Type: Application
    Filed: May 17, 2011
    Publication date: April 11, 2013
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventor: Satoshi Hatsukawa
  • Publication number: 20130049862
    Abstract: A switching circuit according to one embodiment has: N switching elements; a connection circuit including N?1 first inductance elements that are connected in series; a second inductance element; and N third inductance elements. Control terminals of the N switching elements are connected to ends of the connection circuit and connection contacts, respectively. One end of the second inductance element is connected to a power supply. The N third inductance elements electrically connects one ends of the N switching elements and the other end of the second inductance element with each other, respectively.
    Type: Application
    Filed: March 28, 2011
    Publication date: February 28, 2013
    Applicants: National University Corporation TOYOHASHI UNIVERSITY OF TECHNOLOGY, Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Ohira, Kazuyuki Wada, Mitsutoshi Nakata, Kazushi Sawada, Satoshi Hatsukawa, Nobuo Shiga, Kazuhiro Fujikawa
  • Publication number: 20130002336
    Abstract: A bidirectional switch according to one embodiment switches bidirectionally the direction of current flowing between a first and a second terminal, and includes: first and second series circuit sections including first and second semiconductor switch elements that do not have a tolerance in a reverse direction, and first and second reverse current blocking diode sections serially connected to the first and second semiconductor switch elements in a forward direction. The first series circuit section and the second series circuit section are connected in parallel between the first and second terminals so that the forward directions of the first and second semiconductor switch elements face opposite to each other. Each of the first and second reverse current blocking diode sections is configured by connecting in parallel a diode containing GaN as a semiconductor material and a diode containing SiC as a semiconductor material.
    Type: Application
    Filed: June 27, 2012
    Publication date: January 3, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Satoshi HATSUKAWA
  • Publication number: 20120326774
    Abstract: A switching circuit according to one embodiment includes: a switching element that has a first terminal and a second terminal, and is driven by a pulse signal to switch a conduction state between the first and second terminals; a power source section that supplies a voltage to the first terminal; a load circuit that is connected in parallel with the power source section; a passive circuit section that is connected between a connection point between the power source section and the load circuit, and the first terminal, and suppresses a current flowing from the connection point to the switching element at a frequency N times (N is an integer of 1 or more) as high as a clock frequency of the pulse signal; and a resonant circuit section that is connected between the passive circuit section and the connection point, and resonates at the frequency of N times.
    Type: Application
    Filed: June 27, 2012
    Publication date: December 27, 2012
    Applicants: National University Corporation TOYOHASHI UNIVERSITY OF TECHNOLOGY, Sumitomo Electric Industries, Ltd.
    Inventors: Satoshi HATSUKAWA, Nobuo SHIGA, Kazuhiro FUJIKAWA, Takashi OHIRA, Kazuyuki WADA, Tuya WUREN, Kazuya ISHIOKA, Kazushi SAWADA, Hiroshi Ishioka