Patents by Inventor Satoshi Kishimoto
Satoshi Kishimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230390426Abstract: A method for producing a radioactive zirconium complex of the present invention includes a step of reacting a radioactive zirconium ion, a ligand compound containing DOTA or a DOTA derivative, and an additive such as hydroxybenzoic acid and a derivative thereof with one another in a reaction solution to form a radioactive zirconium complex. As the reaction solution, a reaction solution is used in which the amount of radioactivity of the radioactive zirconium ion is 60 MBq or more at the start of the reaction and the amount of radioactivity of the radioactive zirconium ion is 5 MBq or more per 1 nmol of the ligand compound at the start of the reaction.Type: ApplicationFiled: October 14, 2021Publication date: December 7, 2023Applicant: NIHON MEDI-PHYSICS CO., LTD.Inventors: Tomoyuki IMAI, Hiroaki ICHIKAWA, Satoshi KISHIMOTO, Akihiro IZAWA
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Publication number: 20200100565Abstract: A sole structure includes a thin plate made of an elastic material having a higher elastic modulus than that of a midsole and stacked on a lower side of the midsole and a shock-absorbing body made of a soft-elastic material and abutting on a lower surface of the plate at least in a hindfoot area. The plate extends from a position corresponding to calcaneus of the foot of a shoe wearer at least to a position corresponding to first interphalangeal joint of the foot in a longitudinal direction, is interposed between the midsole and the shock-absorbing body in the hindfoot area, is interposed between the midsole and an outsole in a forefoot area, and is formed such that at least a portion of the plate serves as an exposed portion in which a lower surface is exposed above a grounding surface in a midfoot area.Type: ApplicationFiled: September 26, 2019Publication date: April 2, 2020Inventors: Yohei Yoshida, Satoshi Kishimoto, Shogo Matsui
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Publication number: 20190289963Abstract: An upper structure includes: an upper body including a stress relaxing portion which is elastically deformable; and a shoelace (a fastening member) attached to the upper body. The stress relaxing portion has: such stretchability that in an elastic range, the stress relaxing portion stretches to become longer when the upper body is pulled with the shoelace than an initial length of the stress relaxing portion; and stress relaxation properties with which the stress relaxing portion relaxes stress with the passage of time from a moment when the upper body is pulled, while remaining in the stretched state.Type: ApplicationFiled: March 20, 2019Publication date: September 26, 2019Inventors: Kazunori Iuchi, Takao Oda, Chie Yamamoto, Satoshi Kishimoto
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Publication number: 20190069640Abstract: A shoe includes a sole, a shoe upper attached to the sole, and a string member disposed at the sole and the shoe upper such that the string member extends over an area from a forefoot to a hindfoot of a foot, the string member being movable relative to the sole and the shoe upper. The string member is configured such that when the foot is bent at metatarsophalangeal joints and an MP area of the sole is bent and warped in a vertical direction and stretched, a second extension portion is pulled toward a front portion by bending of a first extension portion.Type: ApplicationFiled: September 5, 2018Publication date: March 7, 2019Inventors: Kentaro Yahata, Kouji Ito, Satoshi Kishimoto
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Publication number: 20130146684Abstract: An electrostatic sprayer includes a temperature-humidity sensor which detects a humidity and a temperature of a space where the user is present, and a control section which provides control by adjusting an amount of the liquid transferred by a pressure pump and a voltage applied by a high voltage power supply based on the value detected by the temperature-humidity sensor.Type: ApplicationFiled: August 31, 2011Publication date: June 13, 2013Applicant: DAIKIN INDUSTRIES, LTD.Inventors: Kouichi Minakuchi, Aoi Shinohara, Tomohiko Tsutsumi, Natsumi Yukawa, Akira Nagamori, Satoshi Kishimoto, Makoto Ide, Kouei Obata, Mamoru Okumoto, Masashi Kamada
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Patent number: 8296972Abstract: A shoe 1 of the present invention includes an upper 2 made of a stretchable fabric. The stretchable fabric is integrated with a sole 3 in a state of being stretched. Further, a method of manufacturing the shoe 1 of the present invention is a method of manufacturing a shoe using a stretchable fabric for the upper 2. The method includes steps of: producing an upper pattern using a last having a size smaller than that of the sole 3 as a base; producing the upper 2 with the stretchable fabric being stretched by stretching the upper pattern and fitting the upper pattern onto a last having a size that matches the sole 3; and integrating the upper 2 with the stretchable fabric being stretched with the sole 3.Type: GrantFiled: March 30, 2009Date of Patent: October 30, 2012Assignee: Mizuno CorporationInventors: Natsuki Sato, Tetsuo Yamamoto, Yoshinobu Watanabe, Satoshi Kishimoto
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Patent number: 7733112Abstract: A semiconductor testing circuit of the present invention includes a signal line which is connected to a terminal not to be tested and a plurality of terminals to be tested of a semiconductor device; switch circuits for controlling electrical connection/disconnection between the signal line and the terminals to be tested; and a resistor connected to one end of the signal line. With this configuration, in a test on the AC characteristics of an input signal, a test signal generated by an LSI tester can be inputted to the terminals to be tested through the terminal not to be tested and the signal line by turning on the switch circuits.Type: GrantFiled: July 16, 2008Date of Patent: June 8, 2010Assignee: Panasonic CorporationInventors: Satoshi Kishimoto, Tomohiko Kanemitsu
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Publication number: 20090241374Abstract: A shoe 1 of the present invention includes an upper 2 made of a stretchable fabric. The stretchable fabric is integrated with a sole 3 in a state of being stretched. Further, a method of manufacturing the shoe 1 of the present invention is a method of manufacturing a shoe using a stretchable fabric for the upper 2. The method includes steps of: producing an upper pattern using a last having a size smaller than that of the sole 3 as a base; producing the upper 2 with the stretchable fabric being stretched by stretching the upper pattern and fitting the upper pattern onto a last having a size that matches the sole 3; and integrating the upper 2 with the stretchable fabric being stretched with the sole 3.Type: ApplicationFiled: March 30, 2009Publication date: October 1, 2009Applicant: MIZUNO CORPORATIONInventors: Natsuki SATO, Tetsuo YAMAMOTO, Yoshinobu WATANABE, Satoshi KISHIMOTO
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Publication number: 20090021279Abstract: A semiconductor testing circuit of the present invention includes a signal line which is connected to a terminal not to be tested and a plurality of terminals to be tested of a semiconductor device; switch circuits for controlling electrical connection/disconnection between the signal line and the terminals to be tested; and a resistor connected to one end of the signal line. With this configuration, in a test on the AC characteristics of an input signal, a test signal generated by an LSI tester can be inputted to the terminals to be tested through the terminal not to be tested and the signal line by turning on the switch circuits.Type: ApplicationFiled: July 16, 2008Publication date: January 22, 2009Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Satoshi Kishimoto, Tomohiko Kanemitsu
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Publication number: 20080094096Abstract: In testing a large number of semiconductor devices, semiconductor testing equipment of the present invention is provided with combination determining unit 105 that determines the combination of semiconductor devices to be simultaneously tested among semiconductor devices to be tested, on the basis of one of determination results or measured values in separate testing or manufacturing implemented before and stored in a memory 99, and past determination results or measured values stored in the memory 99 in the present testing.Type: ApplicationFiled: July 24, 2007Publication date: April 24, 2008Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Satoshi Kishimoto, Tomohiko Kanemitsu
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Publication number: 20050258856Abstract: In the shipment test of an LSI provided with a high-speed interface circuit, both cost reduction and a high test guarantee level are realized.Type: ApplicationFiled: May 20, 2005Publication date: November 24, 2005Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Satoshi Kishimoto, Tomohiko Kanemitsu, Michio Maekawa
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Patent number: 4878217Abstract: In a data outputting device, data to be outputted is digitally stored in a memory and is read out when addressed over a predetermined period in a time division multiplex mode with addresses which are provided by a counter in such a manner that the number thereof of addresses provided per predetermined time period corresponds to the number of channels employed, and the data thus read out with the addresses are selected for the channels by a selection circuit, respectively, so that they are outputted separately according to the channels.Type: GrantFiled: February 1, 1988Date of Patent: October 31, 1989Assignee: Pioneer Ansafone Manufacturing CorporationInventors: Norimasa Nakamura, Satoshi Kishimoto