Patents by Inventor Satoshi Shimonishi

Satoshi Shimonishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11025009
    Abstract: A first connector has first rear engagement parts exposed toward the rear of the first connector, along with first front engagement parts exposed towards the front of the first connector. A second connector has second rear engagement parts and second front engagement parts. In the mating state between the first connector and the second connector, the second rear engagement parts are disposed on the rear side of the first rear engagement parts so as to engage with the first rear engagement parts, while the second front engagement parts are disposed on the front side of the first front engagement parts so as to engage with the first front engagement parts.
    Type: Grant
    Filed: December 22, 2019
    Date of Patent: June 1, 2021
    Assignee: Molex, LLC
    Inventors: Satoshi Shimonishi, Toshiya Oda
  • Publication number: 20200212628
    Abstract: A first connector has first rear engagement parts exposed toward the rear of the first connector, along with first front engagement parts exposed towards the front of the first connector. A second connector has second rear engagement parts and second front engagement parts. In the mating state between the first connector and the second connector, the second rear engagement parts are disposed on the rear side of the first rear engagement parts so as to engage with the first rear engagement parts, while the second front engagement parts are disposed on the front side of the first front engagement parts so as to engage with the first front engagement parts.
    Type: Application
    Filed: December 22, 2019
    Publication date: July 2, 2020
    Applicant: Molex, LLC
    Inventors: Satoshi SHIMONISHI, Toshiya ODA
  • Patent number: 7067761
    Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: June 27, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
  • Patent number: 6989073
    Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: January 24, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
  • Publication number: 20050014372
    Abstract: When etching a silicon layer 210 with a processing gas containing a mixed gas constituted of HBr gas, and O2 gas and SiF4 gas and further mixed with both of or either of SF6 gas and NF3 gas by using a pre-patterned mask having a silicon oxide film layer 204 inside an airtight processing container 102, high-frequency power with a first frequency is applied from a first high-frequency source 118 and high-frequency power with a second frequency lower than the first frequency is applied from a second high-frequency source 138 to a lower electrode 104 on which a workpiece is placed. Through this etching process, holes or grooves achieving a high aspect ratio are formed in a desirable shape at the silicon layer.
    Type: Application
    Filed: June 25, 2004
    Publication date: January 20, 2005
    Inventors: Satoshi Shimonishi, Takanori Matsumoto, Katsumi Horiguchi, Kenji Yamamoto, Fumihiko Higuchi
  • Publication number: 20040149698
    Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.
    Type: Application
    Filed: December 23, 2003
    Publication date: August 5, 2004
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
  • Publication number: 20040134610
    Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.
    Type: Application
    Filed: December 23, 2003
    Publication date: July 15, 2004
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
  • Publication number: 20040134609
    Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.
    Type: Application
    Filed: December 23, 2003
    Publication date: July 15, 2004
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
  • Publication number: 20040137746
    Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.
    Type: Application
    Filed: December 23, 2003
    Publication date: July 15, 2004
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
  • Patent number: 6685797
    Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: February 3, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
  • Publication number: 20030127188
    Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.
    Type: Application
    Filed: March 17, 2000
    Publication date: July 10, 2003
    Inventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
  • Patent number: 6303466
    Abstract: A method for manufacturing a semiconductor device capable of improving properties during etching without degrading original properties of a doped oxide film as a hard mask includes a step of baking the doped oxide film after patterned but prior to etching. Thereby, changes in configuration or shape upon etching caused by absorption of moisture is prevented.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: October 16, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Shimonishi, Takanori Matsumoto